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| author | Stanislav Galabov <sgalabov@gmail.com> | 2016-05-10 16:23:54 +0300 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2016-05-12 03:29:36 +0200 |
| commit | ffaaa6788a983a5eae0117d138a297df3f131869 (patch) | |
| tree | ffaf8d9fa46577511bd8c2a1ce228f6261c78ab6 /target/linux/ramips/dts/mt7621.dtsi | |
| parent | b8ab6af1a9b8cf1ac76e7008661fd3e775e9ae2b (diff) | |
| download | upstream-ffaaa6788a983a5eae0117d138a297df3f131869.tar.gz upstream-ffaaa6788a983a5eae0117d138a297df3f131869.tar.bz2 upstream-ffaaa6788a983a5eae0117d138a297df3f131869.zip | |
ramips: DTS modifications
This commit makes the following modifications to ramips dts files:
1. Add clkctrl node to all dtsi files (although not used for now)
2. Add clocks and clock-names properties to some nodes (usbphy, pci)
3. Add usbphy node for rt3050 (although not used for now)
4. Add clock-frequency to uart nodes in mt7621.dtsi and mt7628an.dtsi
These modifications, although not fully used at the moment, will make
it easier for FreeBSD to adopt and use LEDE ramips dts files with
minimal changes for easier maintenance.
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
Diffstat (limited to 'target/linux/ramips/dts/mt7621.dtsi')
| -rw-r--r-- | target/linux/ramips/dts/mt7621.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi index bc30597fdd..2ce07d78af 100644 --- a/target/linux/ramips/dts/mt7621.dtsi +++ b/target/linux/ramips/dts/mt7621.dtsi @@ -109,6 +109,7 @@ reg = <0xc00 0x100>; clocks = <&sysclock>; + clock-frequency = <50000000>; interrupt-parent = <&gic>; interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>; @@ -241,6 +242,11 @@ #reset-cells = <1>; }; + clkctrl: clkctrl { + compatible = "ralink,rt2880-clock"; + #clock-cells = <1>; + }; + sdhci: sdhci@1E130000 { compatible = "ralink,mt7620-sdhci"; reg = <0x1E130000 0x4000>; @@ -349,6 +355,11 @@ status = "okay"; + resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>; + reset-names = "pcie0", "pcie1", "pcie2"; + clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>; + clock-names = "pcie0", "pcie1", "pcie2"; + pcie0 { reg = <0x0000 0 0 0 0>; |