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authorJohn Crispin <john@openwrt.org>2015-12-11 15:02:13 +0000
committerJohn Crispin <john@openwrt.org>2015-12-11 15:02:13 +0000
commit81c999bbda65c5c2e929e6406998ac25dab97f41 (patch)
tree24cf3d774190c1d1e6d4e631a7248ba5a7a48b2c /target/linux/ramips/dts/mt7621.dtsi
parent3357033b7388819106bc042bfe94f9a6ea7c81fa (diff)
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ramips: mt7621: use symbolic names of gic interrupt settings
This also adds dts nodes for cpc and mc for documentation purposes Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com> SVN-Revision: 47836
Diffstat (limited to 'target/linux/ramips/dts/mt7621.dtsi')
-rw-r--r--target/linux/ramips/dts/mt7621.dtsi28
1 files changed, 20 insertions, 8 deletions
diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index 801b075e27..c54334eb8d 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -1,3 +1,5 @@
+#include <dt-bindings/interrupt-controller/mips-gic.h>
+
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -72,12 +74,22 @@
reg = <0x300 0x100>;
};
+ cpc@1fbf0000 {
+ compatible = "mtk,mt7621-cpc";
+ reg = <0x1fbf0000 0x8000>;
+ };
+
+ mc@1fbf8000 {
+ compatible = "mtk,mt7621-mc";
+ reg = <0x1fbf8000 0x8000>;
+ };
+
uartlite@c00 {
compatible = "ns16550a";
reg = <0xc00 0x100>;
interrupt-parent = <&gic>;
- interrupts = <0 26 4>;
+ interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -210,7 +222,7 @@
reg = <0x1E130000 4000>;
interrupt-parent = <&gic>;
- interrupts = <0 20 4>;
+ interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
};
xhci@1E1C0000 {
@@ -220,7 +232,7 @@
reg = <0x1E1C0000 4000>;
interrupt-parent = <&gic>;
- interrupts = <0 22 4>;
+ interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;
};
gic: interrupt-controller@1fbc0000 {
@@ -273,7 +285,7 @@
reset-names = "fe", "eth";
interrupt-parent = <&gic>;
- interrupts = <0 3 4>;
+ interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
mdio-bus {
#address-cells = <1>;
@@ -290,7 +302,7 @@
compatible = "ralink,mt7620a-gsw";
reg = <0x1e110000 8000>;
interrupt-parent = <&gic>;
- interrupts = <0 23 4>;
+ interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
};
pcie@1e140000 {
@@ -313,9 +325,9 @@
>;
interrupt-parent = <&gic>;
- interrupts = <0 4 4
- 0 24 4
- 0 25 4>;
+ interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
+ GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
+ GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";