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author | Andrea Poletti <polex73@yahoo.it> | 2021-07-23 18:15:00 +0200 |
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committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-09-05 23:52:35 +0200 |
commit | de0c380a5f8289839ab970e794a45f0e04a466a3 (patch) | |
tree | 518561a0c094695440b8db055d2cf57e2329b25b /target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts | |
parent | baacdd53dfd1daf3d4fada8921a46a562e4520e2 (diff) | |
download | upstream-de0c380a5f8289839ab970e794a45f0e04a466a3.tar.gz upstream-de0c380a5f8289839ab970e794a45f0e04a466a3.tar.bz2 upstream-de0c380a5f8289839ab970e794a45f0e04a466a3.zip |
ramips: add support for Sitecom WLR-4100 v1 002
Sitecom WLR-4100 v1 002 (marked as X4 N300) is a wireless router
Specification:
SoC: MT7620A
RAM: 64 MB DDR2
Flash: MX25L6405D SPI NOR 8 MB
WIFI: 2.4 GHz integrated
Ethernet: 5x 10/100/1000 Mbps QCA8337
USB: 1x 2.0
LEDS: 2x GPIO controlled, 5x switch
Buttons: 1x GPIO controlled
UART: row of 4 unpopulated holes near USB port, starting count from
white triangle on PCB:
VCC 3.3V
GND
TX
RX
baud: 115200, parity: none, flow control: none
Installation
Connect to one of LAN (yellow) ethernet ports,
Open router configuration interface,
Go to Toolbox > Firmware,
Browse for OpenWrt factory image with dlf extension and hit Apply,
Wait few minutes, after the Power LED will stop blinking, the router is
ready for configuration.
Known issues
Some USB 2.0 devices work at full speed mode 1.1 only
MAC addresses
factory partition only contains one (binary) MAC address in 0x4.
u-boot-env contains four (ascii) MAC addresses, of which two appear
to be valid.
factory 0x4 **:**:**:**:b9:84 binary
u-boot-env ethaddr **:**:**:**:b9:84 ascii
u-boot-env wanaddr **:**:**:**:b9:85 ascii
u-boot-env wlanaddr 00:AA:BB:CC:DD:12 ascii
u-boot-env iNICaddr 00:AA:BB:CC:DD:22 ascii
The factory firmware only assigns ethaddr. Thus, we take the
binary value which we can use directly in DTS.
Additional information
OEM firmware shell password is: SitecomSenao
useful for creating backup of original firmware.
There is also another revision of this device (v1 001), based on RT3352 SoC
Signed-off-by: Andrea Poletti <polex73@yahoo.it>
[remove config DT label, convert to nvmem, remove MAC address
setup from u-boot-env, add MAC address info to commit message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts')
-rw-r--r-- | target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts | 196 |
1 files changed, 196 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts b/target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts new file mode 100644 index 0000000000..614a6103b8 --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7620a.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + compatible = "sitecom,wlr-4100-v1-002", "ralink,mt7620a-soc"; + model = "Sitecom WLR-4100 v1 002"; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + label = "amber:power"; + gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + wifi { + label = "blue:wifi"; + gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + wps { + label = "white:wps"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_WPS_BUTTON>; + }; + + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + usb-power { + gpio-export,name = "usb-power"; + gpio-export,output = <1>; + gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x50000 0x790000>; + }; + + partition@7e0000 { + label = "backup"; + reg = <0x7e0000 0x10000>; + read-only; + }; + + partition@7f0000 { + label = "storage"; + reg = <0x7f0000 0x10000>; + read-only; + }; + }; + }; +}; + +ðernet { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &mdio_pins>; + + nvmem-cells = <&macaddr_factory_4>; + nvmem-cell-names = "mac-address"; + + port@5 { + status = "okay"; + + phy-mode = "rgmii"; + mediatek,fixed-link = <1000 1 1 1>; + }; + + mdio-bus { + status = "okay"; + + ethernet-phy@0 { + reg = <0>; + phy-mode = "rgmii"; + + qca,ar8327-initvals = < + 0x04 0x06200000 /* PORT0 PAD MODE CTRL */ + 0x08 0x01000000 /* PORT5 PAD MODE CTRL RX delay EN all ports 0, 5, 6 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + 0x94 0x00000000 /* PORT6_STATUS */ + >; + }; + }; +}; + +&gsw { + mediatek,ephy-base = /bits/ 8 <8>; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; + +&wmac { + status = "okay"; + + ralink,mtd-eeprom = <&factory 0x0>; +}; + +&state_default { + gpio { + groups = "uartf", "i2c", "wled", "spi refclk"; + function = "gpio"; + }; +}; + +&factory { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_4: macaddr@4 { + reg = <0x4 0x6>; + }; +}; |