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author | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2019-07-03 23:22:25 +0200 |
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committer | Daniel Golle <daniel@makrotopia.org> | 2019-07-10 17:36:29 +0200 |
commit | 48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7 (patch) | |
tree | 6f48a2118b5ab45dcb88ab7dab0b18a6feccb619 /target/linux/ramips/dts/mt7620a_edimax_br-6478ac-v2.dts | |
parent | 402138d12dca1a24d2837145c8d31c9d35769b9d (diff) | |
download | upstream-48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7.tar.gz upstream-48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7.tar.bz2 upstream-48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7.zip |
ramips/mt7620: Name DTS files based on scheme
As introduced with ath79, DTS files for ramips will now be labelled
soc_vendor_device.dts(i). With this change, DTS files can be
selected automatically without further manual links.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/ramips/dts/mt7620a_edimax_br-6478ac-v2.dts')
-rw-r--r-- | target/linux/ramips/dts/mt7620a_edimax_br-6478ac-v2.dts | 216 |
1 files changed, 216 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7620a_edimax_br-6478ac-v2.dts b/target/linux/ramips/dts/mt7620a_edimax_br-6478ac-v2.dts new file mode 100644 index 0000000000..5c90aa1549 --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_edimax_br-6478ac-v2.dts @@ -0,0 +1,216 @@ +/* + * Device Tree file for the Edimax BR-6478AC V2 + * based on Linksys E1700 + * + * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com> + * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com> + * Copyright (C) 2017 James McKenzie <openwrt@madingley.org> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; + +#include "mt7620a.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + compatible = "edimax,br-6478ac-v2", "ralink,mt7620a-soc"; + model = "Edimax BR-6478AC v2"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + reset_wps { + label = "reset_wps"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + label = "br-6478ac-v2:white:power"; + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + }; + internet { + label = "br-6478ac-v2:blue:internet"; + gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; + }; + wlan { + label = "br-6478ac-v2:blue:wlan"; + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + }; + usb { + label = "br-6478ac-v2:blue:usb"; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; + }; + }; + + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + usb-power { + gpio-export,name="usb-power"; + gpio-export,output=<1>; + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + }; + }; +}; + + +&gpio2 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0 0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "cimage"; + reg = <0x50000 0x20000>; + read-only; + }; + + partition@70000 { + compatible = "edimax,uimage"; + label = "firmware"; + reg = <0x00070000 0x00790000>; + }; + }; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "uartf", "nd_sd"; + ralink,function = "gpio"; + }; + }; +}; + +ðernet { + status = "okay"; + mtd-mac-address = <&factory 0x4>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; + mediatek,portmap = "wllll"; + + port@5 { + status = "okay"; + mediatek,fixed-link = <1000 1 1 1>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + phy-mode = "rgmii"; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + phy-mode = "rgmii"; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + phy-mode = "rgmii"; + }; + + phy3: ethernet-phy@3 { + reg = <3>; + phy-mode = "rgmii"; + }; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + + phy1f: ethernet-phy@1f { + reg = <0x1f>; + phy-mode = "rgmii"; + }; + }; +}; + +&gsw { + mediatek,port4 = "gmac"; +}; + +&wmac { + ralink,mtd-eeprom = <&factory 0>; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + mediatek,2ghz = <0>; + }; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; |