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| author | Mathias Kresin <dev@kresin.me> | 2018-08-22 07:30:36 +0200 |
|---|---|---|
| committer | Mathias Kresin <dev@kresin.me> | 2018-08-27 19:31:17 +0200 |
| commit | 3601c3de23f15e2735adc4becdca14c803b6b1a5 (patch) | |
| tree | d46e8c2f29112af0226be9cea085ece1ecef4d89 /target/linux/ramips/dts/TL-WR842NV5.dts | |
| parent | a2488f3a243b60ac05b3a3ae492145d564fc6f6e (diff) | |
| download | upstream-3601c3de23f15e2735adc4becdca14c803b6b1a5.tar.gz upstream-3601c3de23f15e2735adc4becdca14c803b6b1a5.tar.bz2 upstream-3601c3de23f15e2735adc4becdca14c803b6b1a5.zip | |
ramips: fix mt7620 pinmux for second SPI
The mt7620 doesn't have a pinmux group named spi_cs1. The cs1 is part
of the "spi refclk" group. The function "spi refclk" enables the second
chip select.
On reset, the pins of the "spi refclk" group are used as reference
clock and GPIO.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Diffstat (limited to 'target/linux/ramips/dts/TL-WR842NV5.dts')
0 files changed, 0 insertions, 0 deletions