diff options
author | John Crispin <john@openwrt.org> | 2013-10-08 21:10:15 +0000 |
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committer | John Crispin <john@openwrt.org> | 2013-10-08 21:10:15 +0000 |
commit | e382d2c7e615dfbdfeca88b6a66fff5eabd8cc61 (patch) | |
tree | 50d42e0d09921169a24f320f40f470997eca1a60 /target/linux/ramips/dts/MT7620a_MT7530.dts | |
parent | 697bb191b07ef06a9b1b73163051c44216f27b94 (diff) | |
download | upstream-e382d2c7e615dfbdfeca88b6a66fff5eabd8cc61.tar.gz upstream-e382d2c7e615dfbdfeca88b6a66fff5eabd8cc61.tar.bz2 upstream-e382d2c7e615dfbdfeca88b6a66fff5eabd8cc61.zip |
ralink: add support for the mt7530 eval board
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 38345
Diffstat (limited to 'target/linux/ramips/dts/MT7620a_MT7530.dts')
-rw-r--r-- | target/linux/ramips/dts/MT7620a_MT7530.dts | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/MT7620a_MT7530.dts b/target/linux/ramips/dts/MT7620a_MT7530.dts new file mode 100644 index 0000000000..fcd1219e68 --- /dev/null +++ b/target/linux/ramips/dts/MT7620a_MT7530.dts @@ -0,0 +1,107 @@ +/dts-v1/; + +/include/ "mt7620a.dtsi" + +/ { + compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc"; + model = "Ralink MT7620a + MT7530 evaluation board"; + + palmbus@10000000 { + spi@b00 { + status = "okay"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "s25fl064k"; + reg = <0 0>; + linux,modalias = "m25p80", "s25fl064k"; + spi-max-frequency = <10000000>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "firmware"; + reg = <0x50000 0x7b0000>; + }; + }; + }; + }; + + pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "uartf"; + ralink,function = "gpio"; + }; + }; + }; + + ethernet@10100000 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; + + ralink,port-map = "llllw"; + + port@5 { + status = "okay"; + ralink,fixed-link = <1000 1 1 1>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + phy-mode = "rgmii"; + }; + phy1: ethernet-phy@1 { + reg = <1>; + phy-mode = "rgmii"; + }; + phy2: ethernet-phy@2 { + reg = <2>; + phy-mode = "rgmii"; + }; + phy3: ethernet-phy@3 { + reg = <3>; + phy-mode = "rgmii"; + }; + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + phy1f: ethernet-phy@1f { + reg = <0x1f>; + phy-mode = "rgmii"; + }; + }; + }; + + gsw@10110000 { + ralink,port4 = "gmac"; + }; + + pcie@10140000 { + status = "okay"; + }; +}; |