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| author | Michael Lee <igvtee@gmail.com> | 2016-01-07 21:50:24 +0800 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2016-06-13 22:51:42 +0200 |
| commit | d8202a84096831d4e6e2a522476bd6a0d46e6413 (patch) | |
| tree | 5fdd246cb15134f4a4c8030d1bb3235d2cfbaa29 /target/linux/ramips/dts/CF-WR800N.dts | |
| parent | f36d624d88f962b12a7c819d456590d6b0a9ee24 (diff) | |
| download | upstream-d8202a84096831d4e6e2a522476bd6a0d46e6413.tar.gz upstream-d8202a84096831d4e6e2a522476bd6a0d46e6413.tar.bz2 upstream-d8202a84096831d4e6e2a522476bd6a0d46e6413.zip | |
ramips: update i2c drivers
* add rt_i2c structure to store driver data
* rewrite read/write check function and add i2c error status check.
so we don't need to wait until time out.
* add 10 bits address support. according to the data sheet i think
it is possible. but i haven't verify it.
* the most important is start transfer only need once. otherwise
it cause I2C_STARTERR status.
* add set i2c clock speed register by dts options "clock-frequency".
not just hard code it.
* add mt7621 i2c driver. i just copy i2c-ralink.c and change register
names. and the hardware don't support error status. so i remove it.
but the logic is the same.
Signed-off-by: Michael Lee <igvtee@gmail.com>
Diffstat (limited to 'target/linux/ramips/dts/CF-WR800N.dts')
0 files changed, 0 insertions, 0 deletions