upgrade to 2.6.32.7, switch to squashfs, remove broken flag

SVN-Revision: 19562

13 files changed, 1560 insertions, 1581 deletions

diff --git a/target/linux/pxa/patches/000-cpufreq.patch b/target/linux/pxa/patches/000-cpufreq.patch
deleted file mode 100644
index 3cb6676b41..0000000000
--- a/target/linux/pxa/patches/000-cpufreq.patch
+++ /dev/null
@@ -1,533 +0,0 @@
-diff -Nurbw linux-2.6.17/arch/arm/Kconfig linux-2.6.17-patched/arch/arm/Kconfig
---- linux-2.6.17/arch/arm/Kconfig	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/arch/arm/Kconfig	2006-09-21 14:57:02.000000000 -0700
-@@ -656,7 +656,7 @@
- 
- endmenu
- 
--if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
-+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1 || ARCH_PXA)
- 
- menu "CPU Frequency scaling"
- 
-@@ -685,6 +685,13 @@
- 
- endmenu
- 
-+config CPU_FREQ_PXA
-+	bool
-+	depends on CPU_FREQ && ARCH_PXA
-+	default y
-+	select CPU_FREQ_DEFAULT_GOV_USERSPACE
-+	select CPU_FREQ_TABLE
-+
- endif
- 
- menu "Floating point emulation"
-diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c
---- linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c	1969-12-31 16:00:00.000000000 -0800
-+++ linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c	2006-09-21 14:57:02.000000000 -0700
-@@ -0,0 +1,324 @@
-+/*
-+ *  linux/arch/arm/mach-pxa/cpu-pxa.c
-+ *
-+ *  Copyright (C) 2002,2003 Intrinsyc Software
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ * 
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-+ *
-+ * History:
-+ *   31-Jul-2002 : Initial version [FB]
-+ *   29-Jan-2003 : added PXA255 support [FB]
-+ *   20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
-+ * 
-+ * Note:
-+ *   This driver may change the memory bus clock rate, but will not do any
-+ *   platform specific access timing changes... for example if you have flash
-+ *   memory connected to CS0, you will need to register a platform specific
-+ *   notifier which will adjust the memory access strobes to maintain a 
-+ *   minimum strobe width.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/sched.h>
-+#include <linux/init.h>
-+#include <linux/cpufreq.h>
-+
-+#include <asm/hardware.h>
-+#include <asm/arch/pxa-regs.h>
-+
-+#undef DEBUG
-+
-+#ifdef DEBUG
-+  static unsigned int freq_debug = DEBUG;
-+  module_param(freq_debug, int, 0);
-+  MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
-+#else
-+  #define freq_debug  0
-+#endif  
-+
-+typedef struct
-+{
-+    unsigned int khz;
-+    unsigned int membus;
-+    unsigned int cccr;
-+    unsigned int div2;
-+} pxa_freqs_t;
-+
-+/* Define the refresh period in mSec for the SDRAM and the number of rows */
-+#define SDRAM_TREF          64      /* standard 64ms SDRAM */
-+#define SDRAM_ROWS          2048    /* 64MB=8192 32MB=4096 */ 
-+#define MDREFR_DRI(x)       ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
-+
-+#define CCLKCFG_TURBO       0x1
-+#define CCLKCFG_FCS         0x2
-+#define PXA25x_MIN_FREQ     99533
-+#define PXA25x_MAX_FREQ     530842
-+#define MDREFR_DB2_MASK     (MDREFR_K2DB2 | MDREFR_K1DB2)
-+#define MDREFR_DRI_MASK     0xFFF
-+
-+
-+/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
-+static pxa_freqs_t pxa255_run_freqs[] =
-+{
-+    /* CPU   MEMBUS  CCCR  DIV2*/
-+    { 99533,  99533, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50,  SDRAM=50 */
-+    {132710, 132710, 0x123, 1}, /* run=133, turbo=133, PXbus=66,  SDRAM=66 */
-+    {199066,  99533, 0x141, 0}, /* run=199, turbo=199, PXbus=99,  SDRAM=99 */
-+    {265421, 132710, 0x143, 0}, /* run=265, turbo=265, PXbus=133, SDRAM=133 */
-+    {331776, 165888, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
-+    {398131,  99533, 0x161, 0}, /* run=398, turbo=398, PXbus=99,  SDRAM=99 */
-+    {398131, 132710, 0x1c3, 0}, /* run=265, turbo=398, PXbus=133, SDRAM=133 */
-+    {530842, 132710, 0x163, 0}, /* run=531, turbo=531, PXbus=133, SDRAM=133 */
-+    {0,}
-+};
-+#define NUM_RUN_FREQS (sizeof(pxa255_run_freqs)/sizeof(pxa_freqs_t))
-+
-+static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
-+
-+/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
-+static pxa_freqs_t pxa255_turbo_freqs[] =
-+{
-+    /* CPU   MEMBUS  CCCR  DIV2*/
-+    { 99533, 99533,  0x121, 1}, /* run=99,  turbo= 99, PXbus=99, SDRAM=50 */
-+    {149299, 99533,  0x1a1, 0}, /* run=99,  turbo=149, PXbus=99, SDRAM=99 */
-+    {199066, 99533,  0x221, 0}, /* run=99,  turbo=199, PXbus=99, SDRAM=99 */
-+    {298598, 99533,  0x321, 0}, /* run=99,  turbo=299, PXbus=99, SDRAM=99 */
-+    {398131, 99533,  0x241, 1}, /* run=199, turbo=398, PXbus=99, SDRAM=50 */
-+    {0,}
-+};
-+#define NUM_TURBO_FREQS (sizeof(pxa255_turbo_freqs)/sizeof(pxa_freqs_t))
-+
-+static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];
-+
-+extern unsigned get_clk_frequency_khz(int info);
-+
-+/* find a valid frequency point */
-+static int pxa_verify_policy(struct cpufreq_policy *policy)
-+{
-+    int ret;
-+    struct cpufreq_frequency_table *pxa_freqs_table;
-+
-+    if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
-+        pxa_freqs_table = pxa255_run_freq_table;
-+    } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
-+        pxa_freqs_table = pxa255_turbo_freq_table;
-+    } else {
-+        printk("CPU PXA: Unknown policy found. "
-+               "Using CPUFREQ_POLICY_PERFORMANCE\n");
-+        pxa_freqs_table = pxa255_run_freq_table;
-+    } 
-+	ret=cpufreq_frequency_table_verify(policy, pxa_freqs_table);
-+    
-+    if(freq_debug) {
-+        printk("Verified CPU policy: %dKhz min to %dKhz max\n",
-+            policy->min, policy->max);
-+    }
-+
-+    return ret;
-+}
-+
-+static int pxa_set_target(struct cpufreq_policy *policy,
-+                 unsigned int target_freq,
-+                 unsigned int relation)
-+{
-+    int idx;
-+    cpumask_t cpus_allowed;
-+    int cpu = policy->cpu;
-+    struct cpufreq_freqs freqs;
-+    pxa_freqs_t *pxa_freq_settings;
-+    struct cpufreq_frequency_table *pxa_freqs_table;
-+    unsigned long flags;
-+    unsigned int unused;
-+    unsigned int preset_mdrefr, postset_mdrefr;
-+    void *ramstart;
-+
-+    /*
-+     * Save this threads cpus_allowed mask.
-+     */
-+    cpus_allowed = current->cpus_allowed;
-+
-+    /*
-+     * Bind to the specified CPU.  When this call returns,
-+     * we should be running on the right CPU.
-+     */
-+    set_cpus_allowed(current, cpumask_of_cpu(cpu));
-+    BUG_ON(cpu != smp_processor_id());
-+
-+    /* Get the current policy */
-+    if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
-+        pxa_freq_settings = pxa255_run_freqs;
-+        pxa_freqs_table   = pxa255_run_freq_table;
-+    }else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
-+        pxa_freq_settings = pxa255_turbo_freqs;
-+        pxa_freqs_table   = pxa255_turbo_freq_table;
-+    }else {
-+        printk("CPU PXA: Unknown policy found. "
-+               "Using CPUFREQ_POLICY_PERFORMANCE\n");
-+        pxa_freq_settings = pxa255_run_freqs;
-+        pxa_freqs_table   = pxa255_run_freq_table;
-+    } 
-+
-+    /* Lookup the next frequency */
-+	if (cpufreq_frequency_table_target(policy, pxa_freqs_table, 
-+	                                   target_freq, relation, &idx)) {
-+		return -EINVAL;
-+    }
-+
-+    freqs.old = policy->cur;
-+    freqs.new = pxa_freq_settings[idx].khz;
-+    freqs.cpu = policy->cpu;  
-+    if(freq_debug) {
-+        printk(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n", 
-+            freqs.new/1000, (pxa_freq_settings[idx].div2) ? 
-+            (pxa_freq_settings[idx].membus/2000) : 
-+            (pxa_freq_settings[idx].membus/1000));
-+    }
-+
-+    ramstart = phys_to_virt(0xa0000000);
-+
-+    /* 
-+     * Tell everyone what we're about to do... 
-+     * you should add a notify client with any platform specific 
-+     * Vcc changing capability
-+     */
-+    cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-+
-+    /* Calculate the next MDREFR.  If we're slowing down the SDRAM clock
-+     * we need to preset the smaller DRI before the change.  If we're speeding
-+     * up we need to set the larger DRI value after the change.  
-+     */
-+    preset_mdrefr = postset_mdrefr = MDREFR;
-+    if((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {    
-+        preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) | 
-+                        MDREFR_DRI(pxa_freq_settings[idx].membus);
-+    }
-+    postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) | 
-+                    MDREFR_DRI(pxa_freq_settings[idx].membus);
-+    
-+    /* If we're dividing the memory clock by two for the SDRAM clock, this
-+     * must be set prior to the change.  Clearing the divide must be done
-+     * after the change.
-+     */
-+    if(pxa_freq_settings[idx].div2) { 
-+        preset_mdrefr  |= MDREFR_DB2_MASK;
-+        postset_mdrefr |= MDREFR_DB2_MASK;
-+    } else { 
-+        postset_mdrefr &= ~MDREFR_DB2_MASK; 
-+    }
-+    
-+    local_irq_save(flags);
-+    
-+    /* Set new the CCCR */
-+    CCCR = pxa_freq_settings[idx].cccr;
-+
-+    __asm__ __volatile__("                                  \
-+        ldr r4, [%1] ;  /* load MDREFR */                   \
-+        b   2f ;                                            \
-+        .align  5 ;                                         \
-+1:                                                          \
-+        str %4, [%1] ;          /* preset the MDREFR */     \
-+        mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */  \
-+        str %5, [%1] ;          /* postset the MDREFR */    \
-+                                                            \
-+        b   3f       ;                                      \
-+2:      b   1b       ;                                      \
-+3:      nop          ;                                      \
-+        "                                                                            
-+        : "=&r" (unused)                                                             
-+        : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), \
-+          "r" (preset_mdrefr), "r" (postset_mdrefr)             
-+        : "r4", "r5");
-+    local_irq_restore(flags);
-+
-+    /*
-+     * Restore the CPUs allowed mask.
-+     */
-+    set_cpus_allowed(current, cpus_allowed);
-+
-+    /* 
-+     * Tell everyone what we've just done... 
-+     * you should add a notify client with any platform specific 
-+     * SDRAM refresh timer adjustments
-+     */
-+    cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-+
-+    return 0;
-+}
-+
-+static int pxa_cpufreq_init(struct cpufreq_policy *policy)
-+{
-+    cpumask_t cpus_allowed;
-+    unsigned int cpu = policy->cpu;
-+    int i;
-+
-+	cpus_allowed = current->cpus_allowed;
-+
-+	set_cpus_allowed(current, cpumask_of_cpu(cpu));
-+	BUG_ON(cpu != smp_processor_id());
-+
-+    /* set default policy and cpuinfo */
-+    policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
-+    policy->policy = CPUFREQ_POLICY_PERFORMANCE;
-+    policy->cpuinfo.max_freq = PXA25x_MAX_FREQ;
-+    policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
-+    policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
-+    policy->cur = get_clk_frequency_khz(0); /* current freq */
-+    policy->min = policy->max = policy->cur;
-+
-+    /* Generate the run cpufreq_frequency_table struct */
-+    for(i=0;i<NUM_RUN_FREQS;i++) {
-+        pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
-+        pxa255_run_freq_table[i].index = i;    
-+    }
-+    pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
-+    /* Generate the turbo cpufreq_frequency_table struct */
-+    for(i=0;i<NUM_TURBO_FREQS;i++) {
-+        pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;
-+        pxa255_turbo_freq_table[i].index = i;    
-+    }
-+    pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
-+    
-+    set_cpus_allowed(current, cpus_allowed);
-+    printk(KERN_INFO "PXA CPU frequency change support initialized\n");
-+
-+    return 0;
-+}
-+
-+static struct cpufreq_driver pxa_cpufreq_driver = {
-+    .verify     = pxa_verify_policy,
-+    .target     = pxa_set_target,
-+    .init       = pxa_cpufreq_init,
-+    .name       = "PXA25x",
-+};
-+
-+static int __init pxa_cpu_init(void)
-+{
-+    return cpufreq_register_driver(&pxa_cpufreq_driver);
-+}
-+
-+static void __exit pxa_cpu_exit(void)
-+{
-+    cpufreq_unregister_driver(&pxa_cpufreq_driver);
-+}
-+
-+
-+MODULE_AUTHOR ("Intrinsyc Software Inc.");
-+MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture");
-+MODULE_LICENSE("GPL");
-+module_init(pxa_cpu_init);
-+module_exit(pxa_cpu_exit);
-+
-diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/Makefile linux-2.6.17-patched/arch/arm/mach-pxa/Makefile
---- linux-2.6.17/arch/arm/mach-pxa/Makefile	2006-09-21 15:11:33.000000000 -0700
-+++ linux-2.6.17-patched/arch/arm/mach-pxa/Makefile	2006-09-21 14:57:02.000000000 -0700
-@@ -30,5 +30,6 @@
- obj-$(CONFIG_PM) += pm.o sleep.o
- obj-$(CONFIG_PXA_SSP) += ssp.o
-+obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
- 
- ifeq ($(CONFIG_PXA27x),y)
- obj-$(CONFIG_PM) += standby.o
-diff -Nurbw linux-2.6.17/Documentation/cpu-freq/user-guide.txt linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt
---- linux-2.6.17/Documentation/cpu-freq/user-guide.txt	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt	2006-09-21 14:57:02.000000000 -0700
-@@ -18,7 +18,7 @@
- Contents:
- ---------
- 1. Supported Architectures and Processors
--1.1 ARM
-+1.1 ARM, PXA
- 1.2 x86
- 1.3 sparc64
- 1.4 ppc
-@@ -37,14 +37,15 @@
- 1. Supported Architectures and Processors
- =========================================
- 
--1.1 ARM
---------
-+1.1 ARM, PXA
-+------------
- 
- The following ARM processors are supported by cpufreq:
- 
- ARM Integrator
- ARM-SA1100
- ARM-SA1110
-+Intel PXA
- 
- 
- 1.2 x86
-diff -Nurbw linux-2.6.17/drivers/cpufreq/Kconfig linux-2.6.17-patched/drivers/cpufreq/Kconfig
---- linux-2.6.17/drivers/cpufreq/Kconfig	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/cpufreq/Kconfig	2006-09-21 15:06:12.000000000 -0700
-@@ -46,13 +46,9 @@
-          This will show detail CPU frequency translation table in sysfs file
-          system
- 
--# Note that it is not currently possible to set the other governors (such as ondemand)
--# as the default, since if they fail to initialise, cpufreq will be
--# left in an undefined state.
--
- choice
- 	prompt "Default CPUFreq governor"
--	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
-+	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
- 	default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
- 	help
- 	  This option sets which CPUFreq governor shall be loaded at
-@@ -66,6 +62,14 @@
- 	  the frequency statically to the highest frequency supported by
- 	  the CPU.
- 
-+config CPU_FREQ_DEFAULT_GOV_POWERSAVE
-+	bool "powersave"
-+	select CPU_FREQ_GOV_POWERSAVE
-+	help
-+	  Use the CPUFreq governor 'powersave' as default. This sets
-+	  the frequency statically to the lowest frequency supported by
-+	  the CPU.
-+
- config CPU_FREQ_DEFAULT_GOV_USERSPACE
- 	bool "userspace"
- 	select CPU_FREQ_GOV_USERSPACE
-@@ -75,6 +79,23 @@
- 	  program shall be able to set the CPU dynamically without having
- 	  to enable the userspace governor manually.
- 
-+config CPU_FREQ_DEFAULT_GOV_ONDEMAND
-+	bool "ondemand"
-+	select CPU_FREQ_GOV_ONDEMAND
-+	help
-+	  Use the CPUFreq governor 'ondemand' as default.  This sets
-+	  the frequency dynamically based on CPU load, throttling up
-+	  and down as necessary.
-+
-+config CPU_FREQ_DEFAULT_GOV_CONSERVATIVE
-+	bool "conservative"
-+	select CPU_FREQ_GOV_CONSERVATIVE
-+	help
-+	  Use the CPUFreq governor 'conservative' as default. This sets
-+	  the frequency dynamically based on CPU load, throttling up
-+	  and down as necessary. The frequency is gracefully increased
-+	  and decreased rather than jumping to 100% when speed is required.
-+
- endchoice
- 
- config CPU_FREQ_GOV_PERFORMANCE
-diff -Nurbw linux-2.6.17/include/linux/cpufreq.h linux-2.6.17-patched/include/linux/cpufreq.h
---- linux-2.6.17/include/linux/cpufreq.h	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/include/linux/cpufreq.h	2006-09-21 15:08:35.000000000 -0700
-@@ -276,9 +276,18 @@
- #ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
- extern struct cpufreq_governor cpufreq_gov_performance;
- #define CPUFREQ_DEFAULT_GOVERNOR	&cpufreq_gov_performance
-+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE)
-+extern struct cpufreq_governor cpufreq_gov_powersave;
-+#define CPUFREQ_DEFAULT_GOVERNOR	&cpufreq_gov_powersave
- #elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE)
- extern struct cpufreq_governor cpufreq_gov_userspace;
- #define CPUFREQ_DEFAULT_GOVERNOR	&cpufreq_gov_userspace
-+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND)
-+extern struct cpufreq_governor cpufreq_gov_ondemand;
-+#define CPUFREQ_DEFAULT_GOVERNOR	&cpufreq_gov_ondemand;
-+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE)
-+extern struct cpufreq_governor cpufreq_gov_conservative;
-+#define CPUFREQ_DEFAULT_GOVERNOR        &cpufreq_gov_conservative;
- #endif
- 
- 
-diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c
---- linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c	2006-09-21 15:26:46.000000000 -0700
-+++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c	2006-06-17 18:49:35.000000000 -0700
-@@ -529,7 +529,7 @@
- 	return 0;
- }
- 
--static struct cpufreq_governor cpufreq_gov_dbs = {
-+struct cpufreq_governor cpufreq_gov_conservative = {
- 	.name		= "conservative",
- 	.governor	= cpufreq_governor_dbs,
- 	.owner		= THIS_MODULE,
-@@ -537,7 +537,7 @@
- 
- static int __init cpufreq_gov_dbs_init(void)
- {
--	return cpufreq_register_governor(&cpufreq_gov_dbs);
-+	return cpufreq_register_governor(&cpufreq_gov_conservative);
- }
- 
- static void __exit cpufreq_gov_dbs_exit(void)
-@@ -545,7 +545,7 @@
- 	/* Make sure that the scheduled work is indeed not running */
- 	flush_scheduled_work();
- 
--	cpufreq_unregister_governor(&cpufreq_gov_dbs);
-+	cpufreq_unregister_governor(&cpufreq_gov_conservative);
- }
- 
- 
-diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c
---- linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c	2006-09-27 14:00:15.000000000 -0700
-@@ -484,7 +484,7 @@
- 	return 0;
- }
- 
--static struct cpufreq_governor cpufreq_gov_dbs = {
-+struct cpufreq_governor cpufreq_gov_ondemand = {
- 	.name		= "ondemand",
- 	.governor	= cpufreq_governor_dbs,
- 	.owner		= THIS_MODULE,
-@@ -492,7 +492,7 @@
- 
- static int __init cpufreq_gov_dbs_init(void)
- {
--	return cpufreq_register_governor(&cpufreq_gov_dbs);
-+	return cpufreq_register_governor(&cpufreq_gov_ondemand);
- }
- 
- static void __exit cpufreq_gov_dbs_exit(void)
-@@ -504,7 +504,7 @@
- 		destroy_workqueue(dbs_workq);
- 	}
- 
--	cpufreq_unregister_governor(&cpufreq_gov_dbs);
-+	cpufreq_unregister_governor(&cpufreq_gov_ondemand);
- }
- 
- 
diff --git a/target/linux/pxa/patches/001-gumstix_verdex_pro_arch_support.patch b/target/linux/pxa/patches/001-gumstix_verdex_pro_arch_support.patch
new file mode 100644
index 0000000000..aa05cfcfe0
--- /dev/null
+++ b/target/linux/pxa/patches/001-gumstix_verdex_pro_arch_support.patch
@@ -0,0 +1,837 @@
+From 4f4bb58cba3a6c44e9f9f113609287d9d50be9c4 Mon Sep 17 00:00:00 2001
+From: Joseph Kortje <jpktech@rogers.com>
+Date: Wed, 28 Oct 2009 21:11:28 -0400
+Subject: [PATCH] [ARM] Gumstix Verdex Pro arch support
+
+add an option for Verdex Pro when ARCH_GUMSTIX is selected, and
+factor earlier Gumstix support into a seperate option
+
+Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
+---
+ arch/arm/mach-pxa/Kconfig                   |   29 +-
+ arch/arm/mach-pxa/Makefile                  |    3 +-
+ arch/arm/mach-pxa/gumstix-verdex.c          |  749 +++++++++++++++++++++++++++
+ arch/arm/mach-pxa/include/mach/mfp-pxa27x.h |    1 +
+ 4 files changed, 772 insertions(+), 10 deletions(-)
+ create mode 100644 arch/arm/mach-pxa/gumstix-verdex.c
+
+--- a/arch/arm/mach-pxa/Kconfig
++++ b/arch/arm/mach-pxa/Kconfig
+@@ -32,23 +32,34 @@ endmenu
+ endif
+ 
+ config ARCH_GUMSTIX
+-	bool "Gumstix XScale 255 boards"
+-	select PXA25x
++	bool "Gumstix boards"
+ 	help
+-	  Say Y here if you intend to run this kernel on
+-	  Basix, Connex, ws-200ax, ws-400ax systems
++        Say Y here if you intend to run this kernel on a
++	  gumstix computer.
+ 
+-choice
+-	prompt "Gumstix Carrier/Expansion Board"
+ 	depends on ARCH_GUMSTIX
+ 
+-config GUMSTIX_AM200EPD
++config MACH_GUMSTIX_F
++	bool "Gumstix Basix/Connex ..."
++	depends on ARCH_GUMSTIX
++	select PXA25x
++
++ choice
++	prompt "Gumstix Carrier/Expansion Board"
++	depends on MACH_GUMSTIX_F
++
++ config GUMSTIX_AM200EPD
+ 	bool "Enable AM200EPD board support"
+ 
+-config GUMSTIX_AM300EPD
++ config GUMSTIX_AM300EPD
+ 	bool "Enable AM300EPD board support"
+ 
+-endchoice
++ endchoice
++
++config MACH_GUMSTIX_VERDEX
++	bool "Gumstix VERDEX ..."
++	depends on ARCH_GUMSTIX
++	select PXA27x
+ 
+ config MACH_INTELMOTE2
+ 	bool "Intel Mote 2 Platform"
+--- a/arch/arm/mach-pxa/Makefile
++++ b/arch/arm/mach-pxa/Makefile
+@@ -25,7 +25,8 @@ obj-$(CONFIG_CPU_PXA320)	+= pxa320.o
+ obj-$(CONFIG_CPU_PXA930)	+= pxa930.o
+ 
+ # Specific board support
+-obj-$(CONFIG_ARCH_GUMSTIX)	+= gumstix.o
++obj-$(CONFIG_MACH_GUMSTIX_F)	+= gumstix.o
++obj-$(CONFIG_MACH_GUMSTIX_VERDEX)	+= gumstix-verdex.o
+ obj-$(CONFIG_GUMSTIX_AM200EPD)	+= am200epd.o
+ obj-$(CONFIG_GUMSTIX_AM300EPD)	+= am300epd.o
+ obj-$(CONFIG_ARCH_LUBBOCK)	+= lubbock.o
+--- /dev/null
++++ b/arch/arm/mach-pxa/gumstix-verdex.c
+@@ -0,0 +1,749 @@
++/*
++ *  linux/arch/arm/mach-pxa/gumstix-verdex.c
++ *
++ *  Support for the Gumstix verdex motherboard.
++ *
++ *  Original Author:  Craig Hughes
++ *  Created:          Feb 14, 2008
++ *  Copyright:        Craig Hughes
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation.
++ *
++ *  Implemented based on lubbock.c by Nicolas Pitre and code from Craig
++ *  Hughes
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/interrupt.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/i2c/tsc2007.h>
++
++#include <asm/setup.h>
++#include <asm/memory.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++#include <asm/sizes.h>
++#include <asm/io.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++#include <asm/mach/flash.h>
++
++#include <mach/mmc.h>
++#include <mach/udc.h>
++#include <mach/pxafb.h>
++#include <mach/ohci.h>
++#include <plat/i2c.h>
++#include <mach/pxa27x.h>
++#include <mach/pxa27x-udc.h>
++#include <mach/gpio.h>
++
++#include <mach/gumstix.h>
++
++#include "generic.h"
++
++#include <linux/delay.h>
++
++#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
++
++#include <linux/smsc911x.h>
++
++static struct resource verdex_smsc911x_resources[] = {
++	[0] = {
++		.name	= "smsc911x-memory",
++		.start  = PXA_CS1_PHYS,
++		.end    = PXA_CS1_PHYS + 0x000fffff,
++		.flags  = IORESOURCE_MEM,
++	},
++	[1] = {
++		.start  = IRQ_GPIO(GPIO_GUMSTIX_ETH0),
++		.end    = IRQ_GPIO(GPIO_GUMSTIX_ETH0),
++		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
++	},
++};
++
++static struct smsc911x_platform_config verdex_smsc911x_config = {
++	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
++	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
++	.flags		= SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
++	.phy_interface	= PHY_INTERFACE_MODE_MII,
++};
++
++static struct platform_device verdex_smsc911x_device = {
++	.name		= "smsc911x",
++	.id		= -1,
++	.num_resources	= ARRAY_SIZE(verdex_smsc911x_resources),
++	.resource	= verdex_smsc911x_resources,
++	.dev		= {
++		.platform_data = &verdex_smsc911x_config,
++	},
++};
++
++static void __init verdex_init_smsc911x(void)
++{
++
++        printk(KERN_INFO "Initializing Gumstix verdex smsc911x\n");
++
++	if (gpio_request(GPIO_GUMSTIX_ETH0_RST, "SMSC911x_ETH0_RST") != 0) {
++		printk(KERN_ERR "could not obtain gpio for SMSC911x_ETH0_RST\n");
++		goto err_request_gpio_eth0_rst;
++	}
++
++	if (gpio_request(GPIO_GUMSTIX_ETH0, "SMSC911x_ETH0_IRQ") != 0) {
++		printk(KERN_ERR "could not obtain gpio for SMSC911x_ETH0_IRQ\n");
++		goto err_request_gpio_eth0_irq;
++	}
++
++	if (gpio_direction_output(GPIO_GUMSTIX_ETH0_RST, 0) != 0) {
++		printk(KERN_ERR "could not set SMSC911x_ETH0_RST pin to output\n");
++		goto err_dir;
++	}
++
++	gpio_set_value(GPIO_GUMSTIX_ETH0_RST, 0);
++
++	msleep(500); // Hold RESET for at least 200ms
++
++	gpio_set_value(GPIO_GUMSTIX_ETH0_RST, 1);
++
++	msleep(50);
++
++	if (gpio_direction_input(GPIO_GUMSTIX_ETH0) != 0) {
++		printk(KERN_ERR "could not set SMSC911x_ETH0_IRQ pin to input\n");
++		goto err_dir;
++	}
++
++	gpio_export(GPIO_GUMSTIX_ETH0, 0);
++	platform_device_register(&verdex_smsc911x_device);
++	return;
++
++err_dir:
++	gpio_free(GPIO_GUMSTIX_ETH0_RST);
++
++err_request_gpio_eth0_irq:
++	gpio_free(GPIO_GUMSTIX_ETH0);
++
++err_request_gpio_eth0_rst:
++	return;
++}
++
++#else
++static void __init verdex_init_smsc911x(void) { return; }
++#endif
++
++static unsigned long verdex_pin_config[] = {
++    /* MMC */
++    GPIO32_MMC_CLK,
++    GPIO112_MMC_CMD,
++    GPIO92_MMC_DAT_0,
++    GPIO109_MMC_DAT_1,
++    GPIO110_MMC_DAT_2,
++    GPIO111_MMC_DAT_3,
++
++    /* BTUART */
++    GPIO42_BTUART_RXD,
++    GPIO43_BTUART_TXD,
++    GPIO44_BTUART_CTS,
++    GPIO45_BTUART_RTS,
++
++    /* STUART */
++    GPIO46_STUART_RXD,
++    GPIO47_STUART_TXD,
++
++    /* FFUART */
++    GPIO34_FFUART_RXD,
++    GPIO39_FFUART_TXD,
++
++    /* SSP 2 */
++    GPIO19_SSP2_SCLK,
++    GPIO14_SSP2_SFRM,
++    GPIO13_SSP2_TXD,
++    GPIO11_SSP2_RXD,
++
++    /* SDRAM and local bus */
++    GPIO49_nPWE,
++    GPIO15_nCS_1,
++
++    /* I2C */
++    GPIO117_I2C_SCL,
++    GPIO118_I2C_SDA,
++
++    /* PWM 0 */
++    GPIO16_PWM0_OUT,
++
++    /* BRIGHTNESS */
++    GPIO17_PWM1_OUT,
++
++    /* LCD */
++    GPIO58_LCD_LDD_0,
++    GPIO59_LCD_LDD_1,
++    GPIO60_LCD_LDD_2,
++    GPIO61_LCD_LDD_3,
++    GPIO62_LCD_LDD_4,
++    GPIO63_LCD_LDD_5,
++    GPIO64_LCD_LDD_6,
++    GPIO65_LCD_LDD_7,
++    GPIO66_LCD_LDD_8,
++    GPIO67_LCD_LDD_9,
++    GPIO68_LCD_LDD_10,
++    GPIO69_LCD_LDD_11,
++    GPIO70_LCD_LDD_12,
++    GPIO71_LCD_LDD_13,
++    GPIO72_LCD_LDD_14,
++    GPIO73_LCD_LDD_15,
++    GPIO74_LCD_FCLK,
++    GPIO75_LCD_LCLK,
++    GPIO76_LCD_PCLK,
++#ifdef CONFIG_FB_PXA_SHARP_LQ043_PSP
++    /* DISP must be always high while screen is on */
++    /* Done below in verdex_init */
++#else
++    GPIO77_LCD_BIAS,
++#endif
++
++};
++
++#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
++
++static unsigned long gpio_ntschg_0[] = {
++	GPIO104_GPIO,			// pxa_gpio_mode(GPIO_GUMSTIX_nCD_0_MD);
++};
++
++static unsigned long gpio_ntschg_1[] = {
++	GPIO18_GPIO,			// pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_1_MD);
++	GPIO36_GPIO,			// pxa_gpio_mode(GPIO_GUMSTIX_nCD_1_MD);
++	GPIO27_GPIO,			// pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_1_MD);
++};
++
++static unsigned long gpio_prdy_nbsy_old[] = {
++	GPIO111_GPIO,			// pxa_gpio_mode(GPIO_GUMSTIX_nSTSCHG_0_MD);
++	GPIO109_GPIO,			// pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD);
++};
++
++static unsigned long gpio_prdy_nbsy[] = {
++	GPIO96_GPIO,			// pxa_gpio_mode(GPIO_GUMSTIX_PRDY_nBSY_0_MD);
++};
++
++static unsigned long gpio_nhw_init[] = {
++	GPIO48_nPOE,			// pxa_gpio_mode(GPIO_GUMSTIX_nPOE_MD);
++	GPIO102_nPCE_1,			// pxa_gpio_mode(GPIO_GUMSTIX_nPCE_1_MD);
++	GPIO105_nPCE_2,			// pxa_gpio_mode(GPIO_GUMSTIX_nPCE_2_MD);
++	GPIO104_GPIO,			// pxa_gpio_mode(GPIO_GUMSTIX_nCD_0_MD);
++
++	GPIO49_nPWE,			// pxa_gpio_mode(GPIO_GUMSTIX_nPWE_MD);
++	GPIO50_nPIOR,			// pxa_gpio_mode(GPIO_GUMSTIX_nPIOR_MD);
++	GPIO51_nPIOW,			// pxa_gpio_mode(GPIO_GUMSTIX_nPIOW_MD);
++	GPIO79_PSKTSEL,			// pxa_gpio_mode(GPIO_GUMSTIX_pSKTSEL_MD);
++	GPIO55_nPREG,			// pxa_gpio_mode(GPIO_GUMSTIX_nPREG_MD);
++	GPIO56_nPWAIT,			// pxa_gpio_mode(GPIO_GUMSTIX_nPWAIT_MD);
++	GPIO57_nIOIS16,			// pxa_gpio_mode(GPIO_GUMSTIX_nIOIS16_MD);
++};
++
++static	int net_cf_vx_mode = 0;
++static	int pcmcia_cf_nr = 2; 
++
++inline void __init gumstix_pcmcia_cpld_clk(void)
++{
++	GPCR(GPIO_GUMSTIX_nPOE) = GPIO_bit(GPIO_GUMSTIX_nPOE);
++	GPSR(GPIO_GUMSTIX_nPOE) = GPIO_bit(GPIO_GUMSTIX_nPOE);
++}
++
++inline unsigned char __init gumstix_pcmcia_cpld_read_bits(int bits)
++{
++	unsigned char result = 0;
++	unsigned int shift = 0;
++	while(bits--)
++	{
++		result |= !!(GPLR(GPIO_GUMSTIX_nCD_0) & GPIO_bit(GPIO_GUMSTIX_nCD_0)) << shift;
++		shift ++;
++		gumstix_pcmcia_cpld_clk();
++	}
++	printk("CPLD responded with: %02x\n",result);
++	return result;
++}
++
++/* We use the CPLD on the CF-CF card to read a value from a shift register.  If we can read that
++ * magic sequence, then we have 2 CF cards; otherwise we assume just one
++ * The CPLD will send the value of the shift register on GPIO11 (the CD line for slot 0)
++ * when RESET is held in reset.  We use GPIO48 (nPOE) as a clock signal,
++ * GPIO52/53 (card enable for both cards) to control read/write to the shift register
++ */
++static void __init gumstix_count_cards(void)
++{
++
++	if ((gpio_request(GPIO_GUMSTIX_nPOE, "GPIO_GUMSTIX_nPOE") == 0) &&
++	    (gpio_direction_output(GPIO_GUMSTIX_nPOE, 1) == 0))
++		gpio_export(GPIO_GUMSTIX_nPOE, 0);
++	else
++		printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPOE\n");
++	
++	if ((gpio_request(GPIO_GUMSTIX_nPCE_1, "GPIO_GUMSTIX_nPCE_1") == 0) &&
++	    (gpio_direction_output(GPIO_GUMSTIX_nPCE_1, 1) == 0))
++		gpio_export(GPIO_GUMSTIX_nPCE_1, 0);
++	else
++		printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPCE_1\n");
++
++	if ((gpio_request(GPIO_GUMSTIX_nPCE_2, "GPIO_GUMSTIX_nPCE_2") == 0) &&
++	    (gpio_direction_output(GPIO_GUMSTIX_nPCE_2, 1) == 0))
++		gpio_export(GPIO_GUMSTIX_nPCE_2, 0);
++	else
++		printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nPCE_2\n");
++
++	if ((gpio_request(GPIO_GUMSTIX_nCD_0, "GPIO_GUMSTIX_nCD_0") == 0) &&
++	    (gpio_direction_input(GPIO_GUMSTIX_nCD_0) == 0))
++		gpio_export(GPIO_GUMSTIX_nCD_0, 0);
++	else
++		printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_nCD_0\n");
++
++	if (net_cf_vx_mode) {
++		if ((gpio_request(GPIO_GUMSTIX_CF_OLD_RESET, "GPIO_GUMSTIX_CF_OLD_RESET") == 0) &&
++	    	    (gpio_direction_output(GPIO_GUMSTIX_CF_OLD_RESET, 1) == 0)) {
++			gpio_export(GPIO_GUMSTIX_CF_OLD_RESET, 0);
++		} else {
++			printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_CF_OLD_RESET\n");
++		}
++	} else {
++		if ((gpio_request(GPIO_GUMSTIX_CF_RESET, "GPIO_GUMSTIX_CF_RESET") == 0) &&
++	    	    (gpio_direction_output(GPIO_GUMSTIX_CF_RESET, 1) == 0)) {
++			gpio_export(GPIO_GUMSTIX_CF_RESET, 0);
++		} else {
++			printk(KERN_ERR "could not obtain gpio for GPIO_GUMSTIX_CF_RESET\n");
++		}
++	}
++
++	// Setup the shift register
++	GPSR(GPIO_GUMSTIX_nPCE_1) = GPIO_bit(GPIO_GUMSTIX_nPCE_1);
++	GPCR(GPIO_GUMSTIX_nPCE_2) = GPIO_bit(GPIO_GUMSTIX_nPCE_2);
++
++	// Tick the clock to program the shift register
++	gumstix_pcmcia_cpld_clk();
++
++	// Now set shift register into read mode
++	GPCR(GPIO_GUMSTIX_nPCE_1) = GPIO_bit(GPIO_GUMSTIX_nPCE_1);
++	GPSR(GPIO_GUMSTIX_nPCE_2) = GPIO_bit(GPIO_GUMSTIX_nPCE_2);
++
++	// We can read the bits now -- 0xC2 means "Dual compact flash"
++	if(gumstix_pcmcia_cpld_read_bits(8) != 0xC2)
++	{
++		// We do not have 2 CF slots
++		pcmcia_cf_nr = 1;
++	}
++
++	udelay(50);
++
++	if (net_cf_vx_mode) {
++		gpio_set_value(GPIO_GUMSTIX_CF_OLD_RESET, 0);
++		gpio_free(GPIO_GUMSTIX_CF_OLD_RESET);
++	} else {
++		gpio_set_value(GPIO_GUMSTIX_CF_RESET, 0);
++		gpio_free(GPIO_GUMSTIX_CF_RESET);
++	}
++
++	printk(KERN_INFO "found %d CF slots\n", pcmcia_cf_nr);
++
++	gpio_free(GPIO_GUMSTIX_nPCE_2);
++	gpio_free(GPIO_GUMSTIX_nPCE_1);
++	gpio_free(GPIO_GUMSTIX_nPOE);
++	return;
++}
++
++#define	SMC_IO_EXTENT	16
++#define	BANK_SELECT	14
++
++static void __init verdex_pcmcia_pin_config(void)
++{
++	struct resource *res;
++	void *network_controller_memory;
++	struct platform_device *pdev = &verdex_smsc911x_device;
++
++        printk(KERN_INFO "Initializing Gumstix verdex pcmcia\n");
++
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (res == NULL) {
++		printk(KERN_ERR "no memory resource defined\n");
++		goto err_done;
++	}
++
++	res = request_mem_region(res->start, SMC_IO_EXTENT, "smc91x probe");
++	if (res == NULL) {
++		printk(KERN_ERR "failed to request memory resource\n");
++		goto err_done;
++	}
++
++	// We check for the possibility of SMSC91c111 (reg base offset 0x300 from CS1 base)
++	network_controller_memory = ioremap(res->start + 0x300, SMC_IO_EXTENT);
++	if (network_controller_memory == NULL) {
++		printk(KERN_ERR "failed to ioremap() registers\n");
++		goto err_free_mem;
++	}
++
++	// Look for the special 91c111 value in the bank select register
++	if((0xff00 & readw(network_controller_memory+BANK_SELECT)) == 0x3300) {
++		printk(KERN_INFO "Detected netCF-vx board: pcmcia using older GPIO configuration\n");
++		net_cf_vx_mode = 1;
++	} else {
++		printk(KERN_INFO "Not netCF-vx board: pcmcia using newer GPIO configuration\n");
++		net_cf_vx_mode = 0;
++	}
++
++	iounmap(network_controller_memory);
++err_free_mem:
++	release_mem_region(res->start, SMC_IO_EXTENT);
++err_done:
++
++	gumstix_count_cards();	// this can update pcmcia_cf_nr
++
++	// If pcmcia_cf_nr is 1 then we do not have 2 CF slots
++	// Note: logic sequence was altered from previous kernel revs
++	// so that this works as intended now.
++	if (pcmcia_cf_nr != 0)
++	{
++		pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_ntschg_0));
++
++		if(net_cf_vx_mode)
++			pxa2xx_mfp_config(gpio_prdy_nbsy_old, 1);
++		else
++			pxa2xx_mfp_config(gpio_prdy_nbsy, 1);
++
++	} else {
++		// Note: this reconfigures pin GPIO18 to be GPIO-IN so make
++		// sure that this only gets done for the old dual slot board
++		// since that pin is an active AF1 out-mode signal (RDY) on
++		// newer boards and changing the pin mode on the newer boards
++		// would result in memory corruption for the NIC (and hang during
++		// PHY test). 
++		pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_ntschg_1));
++	}
++
++	pxa2xx_mfp_config(ARRAY_AND_SIZE(gpio_nhw_init));
++	return;
++}
++
++int __init gumstix_get_cf_cards(void)
++{
++	return pcmcia_cf_nr;
++}
++EXPORT_SYMBOL(gumstix_get_cf_cards);
++
++#ifdef CONFIG_MACH_GUMSTIX_VERDEX
++int __init gumstix_check_if_netCF_vx(void)
++{
++	return net_cf_vx_mode;
++}
++EXPORT_SYMBOL(gumstix_check_if_netCF_vx);
++#endif
++
++#endif
++
++#if defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) || defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
++static void gumstix_lcd_backlight(int on_or_off)
++{
++	int err;
++	err = gpio_request(17, "LCD BACKLIGHT");
++	if (err) {
++		//pr_warning("Gumstix Verdex: Failed to request LCD Backlight gpio\n");
++		return;
++	}
++
++	if(on_or_off) {
++		gpio_direction_input(17);
++	} else {
++		GPCR(17) = GPIO_bit(17);
++		gpio_direction_output(17, 0);
++		GPCR(17) = GPIO_bit(17);
++	}
++
++	return;	
++}
++#endif
++
++#ifdef CONFIG_FB_PXA_ALPS_CDOLLAR
++static struct pxafb_mode_info gumstix_fb_mode = {
++	.pixclock	= 300000,
++	.xres		= 240,
++	.yres		= 320,
++	.bpp		= 16,
++	.hsync_len	= 2,
++	.left_margin	= 1,
++	.right_margin	= 1,
++	.vsync_len	= 3,
++	.upper_margin	= 0,
++	.lower_margin	= 0,
++	.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++};
++
++static struct pxafb_mach_info gumstix_fb_info = {
++	.modes		= &gumstix_fb_mode,
++	.num_modes	= 1,
++	.lccr0		= LCCR0_Pas | LCCR0_Sngl | LCCR0_Color,
++	.lccr3		= LCCR3_PixFlEdg,
++};
++#elif defined(CONFIG_FB_PXA_SHARP_LQ043_PSP)
++static struct pxafb_mode_info gumstix_fb_mode = {
++	.pixclock	= 110000,
++	.xres		= 480,
++	.yres		= 272,
++	.bpp		= 16,
++	.hsync_len	= 41,
++	.left_margin	= 2,
++	.right_margin	= 2,
++	.vsync_len	= 10,
++	.upper_margin	= 2,
++	.lower_margin	= 2,
++	.sync		= 0, // Hsync and Vsync both active low
++};
++
++static struct pxafb_mach_info gumstix_fb_info = {
++	.modes			= &gumstix_fb_mode,
++	.num_modes		= 1,
++	.lccr0			= LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
++	.lccr3			= LCCR3_OutEnH | LCCR3_PixFlEdg | (0 << 30),
++	.pxafb_backlight_power	= &gumstix_lcd_backlight,
++};
++#elif defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
++static struct pxafb_mode_info gumstix_fb_mode = {
++	.pixclock	= 108696, // 9.2MHz typical DOTCLK from datasheet
++	.xres		= 480,
++	.hsync_len	= 41, // HLW from datasheet: 41 typ
++	.left_margin	= 4, // HBP - HLW from datasheet: 45 - 41 = 4
++	.right_margin	= 8, // HFP from datasheet: 8 typ
++	.yres		= 272,
++	.vsync_len	= 10, // VLW from datasheet: 10 typ
++	.upper_margin	= 2, // VBP - VLW from datasheet: 12 - 10 = 2
++	.lower_margin	= 4, // VFP from datasheet: 4 typ
++	.bpp		= 16,
++	.sync		= 0, // Hsync and Vsync both active low
++};
++
++static struct pxafb_mach_info gumstix_fb_info = {
++	.modes			= &gumstix_fb_mode,
++	.num_modes		= 1,
++	.lccr0			= LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
++	.lccr3			= LCCR3_OutEnH | LCCR3_PixFlEdg | (0 << 30),
++	.pxafb_backlight_power	= &gumstix_lcd_backlight,
++};
++#endif
++
++static struct platform_device verdex_audio_device = {
++    .name       = "pxa2xx-ac97",
++    .id         = -1,
++};
++
++static struct platform_device *devices[] __initdata = {
++    &verdex_audio_device,
++};
++
++/* PXA27x OHCI controller setup */
++#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
++static int ohci_verdex_init(struct device *dev)
++{
++	// Turn on port 2 in host mode
++	UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
++
++	/* See drivers/usb/host/ohci-pxa27x.c for further details but
++           ENABLE_PORT_ALL flag is equivalent to using this old sequence:
++ 	UHCHR = (UHCHR) &
++		~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
++	*/
++	return 0;
++}
++
++static struct pxaohci_platform_data verdex_ohci_platform_data = {
++	.port_mode	= PMM_PERPORT_MODE,
++	.flags		= ENABLE_PORT_ALL,
++	.init		= ohci_verdex_init,
++};
++
++static void __init verdex_ohci_init(void)
++{
++	pxa_set_ohci_info(&verdex_ohci_platform_data);
++}
++#else
++static void __init verdex_ohci_init(void) {
++    printk(KERN_INFO "Gumstix verdex host usb ohci is disabled\n");
++}
++#endif
++
++
++#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
++static struct pxamci_platform_data verdex_mci_platform_data;
++
++static int verdex_mci_init(struct device *dev, irq_handler_t detect_int,
++                void *data)
++{
++    /* GPIO setup for MMC on the 120-pin connector is done in verdex_init.
++     * There is no card detect on a uSD connector so no interrupt to register.
++     * There is no WP detect GPIO line either.
++     */
++
++    return 0;
++}
++
++static struct pxamci_platform_data verdex_mci_platform_data = {
++    .ocr_mask   = MMC_VDD_32_33|MMC_VDD_33_34,
++    .init       = verdex_mci_init,
++};
++
++static void __init verdex_mmc_init(void)
++{
++    pxa_set_mci_info(&verdex_mci_platform_data);
++}
++#else
++static void __init verdex_mmc_init(void)
++{
++    printk(KERN_INFO "Gumstix verdex mmc disabled\n");
++}
++#endif
++
++#if defined(CONFIG_USB_GADGET_PXA2XX) || defined(CONFIG_USB_GADGET_PXA2XX_MODULE)
++static struct pxa2xx_udc_mach_info verdex_udc_info __initdata = {
++    .gpio_vbus      = GPIO35,
++    .gpio_pullup    = GPIO41,
++};
++
++static void __init verdex_udc_init(void)
++{
++    pxa_set_udc_info(&verdex_udc_info);
++}
++#else
++static void __init verdex_udc_init(void)
++{
++    printk(KERN_INFO "Gumstix verdex udc is disabled\n");
++}
++#endif
++
++#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
++
++#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
++
++#define VERDEX_GPIO_PENDOWN	16
++
++static int tsc2003_init_platform_hw(void)
++{
++	return 0;
++}
++
++static void tsc2003_exit_platform_hw(void)
++{
++	return;
++}
++
++static void tsc2003_clear_penirq(void)
++{
++	return;
++}
++
++static int tsc2003_get_pendown_state(void)
++{
++	return !gpio_get_value(VERDEX_GPIO_PENDOWN);
++}
++
++static struct tsc2007_platform_data tsc2003_config = {
++	.model = 2003,
++	.x_plate_ohms = 100,
++	.get_pendown_state	= tsc2003_get_pendown_state,
++	.clear_penirq		= tsc2003_clear_penirq,
++	.init_platform_hw	= tsc2003_init_platform_hw,
++	.exit_platform_hw	= tsc2003_exit_platform_hw,
++};
++#endif
++
++static struct i2c_board_info __initdata verdex_i2c_board_info[] = {
++#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
++
++	{
++		I2C_BOARD_INFO("rtc-ds1307", 0x68),
++	},
++#endif
++#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
++	{
++		I2C_BOARD_INFO("tsc2003", 0x48),
++		.platform_data	= &tsc2003_config,
++		.irq		= IRQ_GPIO(VERDEX_GPIO_PENDOWN),
++	},
++#endif
++};
++
++static struct i2c_pxa_platform_data verdex_i2c_pwr_info = {
++	.fast_mode = 1,
++};
++
++static struct i2c_pxa_platform_data verdex_i2c_info = {
++	.fast_mode = 1,
++};
++
++static void __init verdex_i2c_init(void)
++{
++        printk(KERN_INFO "Initializing Gumstix verdex i2c\n");
++
++#if defined(CONFIG_TOUCHSCREEN_TSC2003) || defined(CONFIG_TOUCHSCREEN_TSC2003_MODULE)
++	if ((gpio_request(VERDEX_GPIO_PENDOWN, "TSC2003_PENDOWN") == 0) &&
++	    (gpio_direction_input(VERDEX_GPIO_PENDOWN) == 0)) {
++		gpio_export(VERDEX_GPIO_PENDOWN, 0);
++	} else {
++		printk(KERN_ERR "could not obtain gpio for TSC2003_PENDOWN\n");
++		return;
++	}
++#endif
++
++	i2c_register_board_info(0, verdex_i2c_board_info,
++				ARRAY_SIZE(verdex_i2c_board_info));
++	pxa_set_i2c_info(&verdex_i2c_info);
++	pxa27x_set_i2c_power_info(&verdex_i2c_pwr_info);
++}
++#else
++static inline void verdex_i2c_init(void) {}
++#endif
++
++#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
++static void __init verdex_pcmcia_init(void)
++{
++	verdex_pcmcia_pin_config();
++}
++#else
++static void __init verdex_pcmcia_init(void) {
++	printk(KERN_INFO "Gumstix verdex pcmcia is disabled\n");
++}
++#endif
++
++
++static void __init verdex_init(void)
++{
++    pxa2xx_mfp_config(ARRAY_AND_SIZE(verdex_pin_config));
++
++#ifdef CONFIG_FB_PXA_SHARP_LQ043_PSP
++    /* DISP must be always high while screen is on */
++	gpio_direction_output(GPIO77, 0);
++	GPSR(GPIO77) = GPIO_bit(GPIO77);
++#endif 
++    verdex_udc_init();
++    verdex_mmc_init();
++    verdex_ohci_init();
++    verdex_i2c_init();
++    verdex_init_smsc911x();
++    verdex_pcmcia_init();
++ 
++#if defined(CONFIG_FB_PXA_ALPS_CDOLLAR) || defined(CONFIG_FB_PXA_SHARP_LQ043_PSP) || defined(CONFIG_FB_PXA_SAMSUNG_LTE430WQ_F0C)
++        printk(KERN_INFO "Initializing Gumstix verdex FB info\n");
++	set_pxa_fb_info(&gumstix_fb_info);
++#endif
++    printk(KERN_INFO "Initializing Gumstix platform_add_devices\n");
++    (void) platform_add_devices(devices, ARRAY_SIZE(devices));
++}
++
++MACHINE_START(GUMSTIX, "Gumstix verdex")
++    .phys_io        = 0x40000000,
++    .boot_params    = 0xa0000100, /* match u-boot bi_boot_params */
++    .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
++    .map_io         = pxa_map_io,
++    .init_irq       = pxa27x_init_irq,
++    .timer          = &pxa_timer,
++    .init_machine   = verdex_init,
++MACHINE_END
++
+--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
++++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+@@ -109,6 +109,7 @@
+ #define GPIO54_nPCE_2		MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH)
+ #define GPIO78_nPCE_2		MFP_CFG_OUT(GPIO78, AF1, DRIVE_HIGH)
+ #define GPIO87_nPCE_2		MFP_CFG_IN(GPIO87, AF1)
++#define GPIO105_nPCE_2		MFP_CFG_OUT(GPIO105, AF1, DRIVE_HIGH)
+ #define GPIO55_nPREG		MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH)
+ #define GPIO50_nPIOR		MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH)
+ #define GPIO51_nPIOW		MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH)
diff --git a/target/linux/pxa/patches/001-pm.patch b/target/linux/pxa/patches/001-pm.patch
deleted file mode 100644
index 799b9bd536..0000000000
--- a/target/linux/pxa/patches/001-pm.patch
+++ /dev/null
@@ -1,869 +0,0 @@
-diff -NurbwB linux-2.6.17/arch/arm/mach-pxa/pm.c linux-2.6.17-patched/arch/arm/mach-pxa/pm.c
---- linux-2.6.17/arch/arm/mach-pxa/pm.c	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/arch/arm/mach-pxa/pm.c	2006-09-11 10:58:41.000000000 -0700
-@@ -10,35 +10,50 @@
-  * This program is free software; you can redistribute it and/or
-  * modify it under the terms of the GNU General Public License.
-  */
-+
- #include <linux/config.h>
- #include <linux/init.h>
--#include <linux/module.h>
--#include <linux/suspend.h>
-+#include <linux/pm.h>
-+#include <linux/slab.h>
-+#include <linux/sched.h>
-+#include <linux/interrupt.h>
-+#include <linux/sysctl.h>
- #include <linux/errno.h>
--#include <linux/time.h>
- 
- #include <asm/hardware.h>
- #include <asm/memory.h>
- #include <asm/system.h>
--#include <asm/arch/pm.h>
-+#include <asm/leds.h>
-+#include <asm/uaccess.h>
- #include <asm/arch/pxa-regs.h>
- #include <asm/arch/lubbock.h>
- #include <asm/mach/time.h>
- 
-+/**/
-+#include <linux/module.h>
-+/**/
-+//kirti
-+#include <linux/delay.h>
-+//kirti~
- 
- /*
-  * Debug macros
-  */
--#undef DEBUG
-+#define DEBUG
-+
-+extern void pxa_cpu_suspend(void);
-+extern void pxa_cpu_resume(void);
-+
-+int pm_pwronoff;
-+/*Angelia Additions */
-+int pm_pedr=0;
-+EXPORT_SYMBOL(pm_pwronoff);
-+EXPORT_SYMBOL(pm_pedr);
-+
- 
- #define SAVE(x)		sleep_save[SLEEP_SAVE_##x] = x
- #define RESTORE(x)	x = sleep_save[SLEEP_SAVE_##x]
- 
--#define RESTORE_GPLEVEL(n) do { \
--	GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
--	GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
--} while (0)
--
- /*
-  * List of global PXA peripheral registers to preserve.
-  * More ones like CP and general purpose register values are preserved
-@@ -46,97 +61,405 @@
-  */
- enum {	SLEEP_SAVE_START = 0,
- 
--	SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
--	SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
--	SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
--	SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
--	SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
--
--	SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
--	SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
--	SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
--	SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
-+	SLEEP_SAVE_OSCR, SLEEP_SAVE_OIER,
-+	SLEEP_SAVE_OSMR0, SLEEP_SAVE_OSMR1, SLEEP_SAVE_OSMR2, SLEEP_SAVE_OSMR3,
- 
--	SLEEP_SAVE_PSTR,
-+	SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2,
-+	SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2,
-+	SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2,
-+	SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR2_L,
-+	SLEEP_SAVE_GAFR0_U, SLEEP_SAVE_GAFR1_U, SLEEP_SAVE_GAFR2_U,
-+
-+	SLEEP_SAVE_FFIER, SLEEP_SAVE_FFLCR, SLEEP_SAVE_FFMCR,
-+	SLEEP_SAVE_FFSPR, SLEEP_SAVE_FFISR,
-+	SLEEP_SAVE_FFDLL, SLEEP_SAVE_FFDLH,SLEEP_SAVE_FFFCR,
-+
-+	SLEEP_SAVE_STIER, SLEEP_SAVE_STLCR, SLEEP_SAVE_STMCR,
-+	SLEEP_SAVE_STSPR, SLEEP_SAVE_STISR,
-+	SLEEP_SAVE_STDLL, SLEEP_SAVE_STDLH,
-+
-+	SLEEP_SAVE_BTIER, SLEEP_SAVE_BTLCR, SLEEP_SAVE_BTMCR,
-+	SLEEP_SAVE_BTSPR, SLEEP_SAVE_BTISR,
-+	SLEEP_SAVE_BTDLL, SLEEP_SAVE_BTDLH,
- 
- 	SLEEP_SAVE_ICMR,
- 	SLEEP_SAVE_CKEN,
- 
--#ifdef CONFIG_PXA27x
-- 	SLEEP_SAVE_MDREFR,
-- 	SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
-- 	SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
--#endif
-+	SLEEP_SAVE_LCCR0, SLEEP_SAVE_LCCR1, SLEEP_SAVE_LCCR2,SLEEP_SAVE_LCCR3,
-+	SLEEP_SAVE_TMEDCR, SLEEP_SAVE_FDADR0, SLEEP_SAVE_FSADR0,SLEEP_SAVE_FIDR0,SLEEP_SAVE_FDADR1,
-+	SLEEP_SAVE_LDCMD0,
-+
-+	SLEEP_SAVE_NSSCR0,SLEEP_SAVE_NSSCR1,SLEEP_SAVE_NSSSR,SLEEP_SAVE_NSSITR,SLEEP_SAVE_NSSDR,
-+	SLEEP_SAVE_NSSTO,SLEEP_SAVE_NSSPSP,
- 
--	SLEEP_SAVE_CKSUM,
- 
-+	SLEEP_SAVE_CKSUM,
- 	SLEEP_SAVE_SIZE
- };
- 
-+/**/
-+#define UART_DTR	1
-+#define UART_RTS	2
-+
-+/**/
- 
--int pxa_pm_enter(suspend_state_t state)
-+int pm_do_suspend(void)
- {
- 	unsigned long sleep_save[SLEEP_SAVE_SIZE];
- 	unsigned long checksum = 0;
--	struct timespec delta, rtc;
- 	int i;
-+	int valbefore,valafter,valafter1;
-+	int gpsr0,gpsr1,gpsr2;
- 	extern void pxa_cpu_pm_enter(suspend_state_t state);
- 
--#ifdef CONFIG_IWMMXT
--	/* force any iWMMXt context to ram **/
--	iwmmxt_task_disable(NULL);
--#endif
-+	// YoKu 16Feb06 GPIO Changed ----->
-+
-+	PGSR2 |= GPIO_bit(78);
-+/*	if(GPLR2 & GPIO_bit(78))		// LCD Reset Pin
-+		PGSR2 |= GPIO_bit(78);
-+	else
-+		PGSR2 &= ~GPIO_bit(78); 	*/
-+	GPDR0 &= ~GPIO_bit(0);
-+	GPDR0 &= ~GPIO_bit(1);
-+	GPDR0 &= ~GPIO_bit(3); //Tushar: 20 apr GPIO3 configured as input
-+	GPDR0 &= ~GPIO_bit(2);
-+//	GPDR0 &= ~GPIO_bit(5);
-+//	GPDR0 &= ~GPIO_bit(6);
-+//	GPDR0 &= ~GPIO_bit(7);
-+//	GPDR0 &= ~GPIO_bit(8);	
-+
-+
-+// KeyCol pin Status in sleep mode
-+	PGSR0 &= ~GPIO_bit(9);         //19
-+        PGSR0 &= ~GPIO_bit(10);        //20
-+        PGSR0 &= ~GPIO_bit(11);        //21
-+        PGSR0 &= ~GPIO_bit(12);        //22
-+        PGSR0 &= ~GPIO_bit(13);        //23
-+        PGSR0 &= ~GPIO_bit(14);        //24
-+
-+	printk("KER_PM: Setting up wakeup sources 26May06\n");
-+
-+	// KeyPad
-+	//printk("KER_PM: Uncommented key pad wakeup sources\n");
-+	PWER |= GPIO_bit(5);		//11
-+	PWER |= GPIO_bit(6);		//12
-+	PWER |= GPIO_bit(7);		//13
-+	PWER |= GPIO_bit(8);		//14
-+	PFER |= GPIO_bit(5);		//11
-+	PFER |= GPIO_bit(6);		//12
-+	PFER |= GPIO_bit(7);		//13
-+	PFER |= GPIO_bit(8);		//14
-+	PRER |= GPIO_bit(5);		//11
-+	PRER |= GPIO_bit(6);		//12
-+	PRER |= GPIO_bit(7);		//13
-+	PRER |= GPIO_bit(8);		//14		
-+
-+	// USB
-+	PWER |= GPIO_bit(3);		//6
-+	PFER |= GPIO_bit(3);		//6
-+	PRER |= GPIO_bit(3);		//6
-+
-+	// PMU
-+	PWER |= GPIO_bit(2);		//4
-+	PFER |= GPIO_bit(2);		//4
-+	PRER |= GPIO_bit(2);		//4
-+
-+	// Anup : GSM RI
-+        PWER |= GPIO_bit(0);		//0
-+        PFER |= GPIO_bit(0);		//0
-+        PRER |= GPIO_bit(0);		//0
-+	// anup prashant : for gsm reset problem 19 may 2006
-+	//GPDR0 |= GPIO_bit(18); 	YoKu Commented this line, GPIO18 should be i/p pin to avoid GSM Reset pulse	
-+	PGSR0 |= GPIO_bit(18);		// GSM reset pin
-+	PGSR0 |= GPIO_bit(0);		//
-+	PGSR1 |= GPIO_bit(38);		// commneted .18 apr
-+	//  <----- YoKu
-+
-+	// YoKu ----->
-+	// When exiting from sleep mode, 10us Low pulse comes on GSM Reset and Pwr pin
-+	// to avoid this configure GPIO 18,80 as input pins before going to sleep mode
-+        GPDR0 &= ~GPIO_bit(18);
-+        //GPDR2 &= ~GPIO_bit(80);
-+        // <----- YoKu
-+
-+	//kirti for RTC
-+        PWER |= PWER_RTC;
-+	//kirti	cli();
-+	local_irq_disable();
-+	//kirti	clf();
-+	local_fiq_disable();
-+	leds_event(led_stop);
-+
-+	/* Put Current time into RCNR */
-+	RCNR = xtime.tv_sec;
- 
--	/* preserve current time */
--	rtc.tv_sec = RCNR;
--	rtc.tv_nsec = 0;
--	save_time_delta(&delta, &rtc);
-+	printk("11May2006 KERR: pgsr0=0x%08x pgsr1=0x%08x pgsr2= 0x%08x\n",PGSR0,PGSR1,PGSR2);
-+	printk("KER_PM_DELAY: SSCR Going to Sleep at RCNR =%d\n\n\n\n\n\n",RCNR);
-+
-+	/* 
-+	 * Temporary solution.  This won't be necessary once
-+	 * we move pxa support into the serial driver
-+	 * Save the FF UART 
-+	 */
-+
-+	// Anup : commented for power saving mode problem
-+	printk("\nPM: Why doesnt it prnt?? 26May06\n");
-+	printk("\nPM : GSM Sleep Mode enabled");
-+
-+
-+	FFMCR &= ~UART_RTS;
-+	udelay(2000);
-+	udelay(2000);
-+	FFMCR &= ~UART_DTR ;
-+	udelay(2000);
-+	
-+	udelay(2000);
-+	// rupali
-+	// Anup : Do not check here
-+/*	if(!pm_pwronoff)
-+	{
-+		printk("\nPM : Modem Control Register = %x " , FFMCR);
-+		while( FFMSR & 0x00000020)
-+		{
-+			printk("\nPM : FFFSR = %x " , FFMSR);
-+		}
-+	}		*/
-+	udelay(2000);
-+							
-+//Tushar: 19 apr
-+//	NSSCR0 &= 0xFFFFFF7F;
-+//	printk("\nPM: NSSCR0 = %x" ,NSSCR0 );
-+
-+	SAVE(FFIER);
-+	SAVE(FFLCR);
-+	SAVE(FFMCR);
-+	SAVE(FFSPR);
-+	SAVE(FFISR);
-+	FFLCR |= 0x80;
-+	SAVE(FFDLL);
-+	SAVE(FFDLH);
-+	SAVE(FFFCR);
-+	FFLCR &= 0xef;
-+
-+	SAVE(STIER);
-+	SAVE(STLCR);
-+	SAVE(STMCR);
-+	SAVE(STSPR);
-+	SAVE(STISR);
-+	STLCR |= 0x80;
-+	SAVE(STDLL);
-+	SAVE(STDLH);
-+	STLCR &= 0xef;
-+
-+	SAVE(BTIER);
-+	SAVE(BTLCR);
-+	SAVE(BTMCR);
-+	SAVE(BTSPR);
-+	SAVE(BTISR);
-+	BTLCR |= 0x80;
-+	SAVE(BTDLL);
-+	SAVE(BTDLH);
-+	BTLCR &= 0xef;
-+
-+	/* save vital registers */
-+	SAVE(OSCR);
-+	SAVE(OSMR0);
-+	SAVE(OSMR1);
-+	SAVE(OSMR2);
-+	SAVE(OSMR3);
-+	SAVE(OIER);
- 
--	SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
- 	SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
- 	SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
- 	SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
--	SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
--
- 	SAVE(GAFR0_L); SAVE(GAFR0_U);
- 	SAVE(GAFR1_L); SAVE(GAFR1_U);
- 	SAVE(GAFR2_L); SAVE(GAFR2_U);
- 
--#ifdef CONFIG_PXA27x
--	SAVE(MDREFR);
--	SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3);
--	SAVE(GAFR3_L); SAVE(GAFR3_U);
--	SAVE(PWER); SAVE(PCFR); SAVE(PRER);
--	SAVE(PFER); SAVE(PKWR);
--#endif
-+	// YoKu 23Feb06 Added To save LCD Registers, updated by kirti 24Feb06 ----->
-+	SAVE(LCCR0); SAVE(LCCR1); SAVE(LCCR2); SAVE(LCCR3);
-+	SAVE(FDADR0); 
-+	SAVE(FDADR1); 
-+	LCSR = 0xffffffff;	/* Clear LCD Status Register */
-+	
-+//	LCCR0 &= ~LCCR0_LDM;	/* Enable LCD Disable Done Interrupt */
-+//	LCCR0 |= LCCR0_DIS;	/* Disable LCD Controller */
-+
-+	SAVE(LDCMD0);		
-+	// <----- YoKu
-+
-+//	LCCR0 &= ~LCCR0_LDM;    /* Enable LCD Disable Done Interrupt */
-+//      LCCR0 |= LCCR0_DIS;     /* Disable LCD Controller */
-+
- 
- 	SAVE(ICMR);
- 	ICMR = 0;
- 
- 	SAVE(CKEN);
--	SAVE(PSTR);
-+	CKEN = 0;
-+
-+	// Anup : For Wifi power saving mode 2 May 2006
-+        SAVE(NSSCR0);SAVE(NSSCR1);SAVE(NSSSR);SAVE(NSSITR);SAVE(NSSDR);SAVE(NSSTO);
-+        SAVE(NSSPSP);
-+        printk("\nMY favourite mode in life.......sleep.....\n");
-+
- 
- 	/* Note: wake up source are set up in each machine specific files */
- 
-+	/*Changes to keep the right sim selected */
-+	gpsr0 = GPLR0;
-+	gpsr1 = GPLR1;
-+	gpsr2 = GPLR2;
-+
-+	/*Sim 1 selected */
-+	// YoKu GPIOs Changed ----->
-+	if( (GPLR0 & GPIO_bit(21)) && !(GPLR0 & GPIO_bit(22)) ) // 62,63
-+	{
-+		PGSR0 |= GPIO_bit(21) ;		//62
-+		PGSR0 &= ~GPIO_bit(22) ;	//63	
-+	}
-+	else if (!(GPLR0 & GPIO_bit(21)) && (GPLR0 & GPIO_bit(22)) ) // 62,63
-+	{
-+		PGSR0 |= GPIO_bit(22) ;		//63
-+		PGSR0 &= ~GPIO_bit(21) ; 	//62
-+	} /* sim 2*/
-+	// <----- YoKu
-+
- 	/* clear GPIO transition detect  bits */
- 	GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
--#ifdef CONFIG_PXA27x
--	GEDR3 = GEDR3;
--#endif
- 
- 	/* Clear sleep reset status */
- 	RCSR = RCSR_SMR;
- 
-+	/* set resume return address */
-+	PSPR = virt_to_phys(pxa_cpu_resume);
-+
- 	/* before sleeping, calculate and save a checksum */
- 	for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
- 		checksum += sleep_save[i];
- 	sleep_save[SLEEP_SAVE_CKSUM] = checksum;
- 
--	/* *** go zzz *** */
--	pxa_cpu_pm_enter(state);
-+	 PGSR0 |= GPIO_bit(15);   //sidd for wake from Sleep 15, YoKu Comented ?? GPIO15 was ChipSelect
-+	PGSR2 |= GPIO_bit(80);   //sidd for GSM Engine 69, YoKu GPIO Changed	Anup :commented
-+
-+	PGSR1 &= ~GPIO_bit(33); //Tushar: BT Codec Power Down
-+
-+	PGSR0 &= ~GPIO_bit(23); //Tushar: BGW200 Regulator OFF	
-+
-+//	GPDR1 |= GPIO_bit(49); //Tushar: LCD Serial Data in changed to O/P
-+
-+//	PGSR1 &= ~GPIO_bit(48);//Tushar: LCD Serial Pins
-+
-+//	PGSR1 &= ~GPIO_bit(49);
-+
-+//	PGSR1 &= ~GPIO_bit(50);
-+
-+//	PGSR1 |= GPIO_bit(51);
-+
-+//	PGSR1 &= 0x03FFFFFF;//Tushar: 24apr LCD datalines
-+//	PGSR2 &= 0xFFFFFC00;
-+
-+	PGSR0 &= ~GPIO_bit(24); //Tushar: Mux Control Signals
-+
-+	PGSR0 &= ~GPIO_bit(25);
-+
-+	PGSR0 &= ~GPIO_bit(26);
-+
-+	PGSR0 &= ~GPIO_bit(27);
-+
-+ //       GPDR0 |= GPIO_bit(17); //Tushar: unused GPIOs 19apr
-+   //     GPCR0 |= GPIO_bit(17);
-+        PGSR0 &= ~GPIO_bit(17);
-+
-+//	GPDR1 |= GPIO_bit(56); //Tushar: unused GPIOs 19apr
-+  //      GPCR1 |= GPIO_bit(56);
-+        PGSR1 &= ~GPIO_bit(56);
-+
-+//	GPDR2 |= GPIO_bit(79);//Tushar: unused GPIOs 19apr
-+//	GPCR2 |= GPIO_bit(79);
-+	PGSR2 &= ~GPIO_bit(79);
-+
-+//	GPDR1 |= 0x03F00000;//Tushar: unused GPIOs 19apr
-+//	GPCR1 |= 0x03F00000;
-+	PGSR1 &= 0xFC0FFFFF; 
-+
-+
-+	GPDR0 |= GPIO_bit(19);//Tushar: SIM Present Inputs configured as outputs
-+	GPDR0 |= GPIO_bit(20);
-+	PGSR0 &= ~GPIO_bit(19);
-+	PGSR0 &= ~GPIO_bit(20);
-+
-+	
-+//Tushar: 25apr FFRTS FFDTR & FFTXD 
-+
-+	PGSR1 |= GPIO_bit(39);
-+	PGSR1 |= GPIO_bit(40);
-+	PGSR1 |= GPIO_bit(41);
-+/*
-+	PGSR2 &= GPIO_bit(81); //Tushar: 24apr NSSP pins
-+	PGSR2 &= GPIO_bit(82);
-+	PGSR2 &= GPIO_bit(83);
-+
-+	PGSR2 |= GPIO_bit(74);
-+ 	PGSR2 |= GPIO_bit(75);
-+ 	PGSR2 |= GPIO_bit(76);
-+ 	PGSR2 |= GPIO_bit(77);
-+*/
-+	if(pm_pwronoff)
-+	{
-+		/* We are here bcos of pressing of on off switch
-+		   We wake up now only on pwr switch */
-+		printk("Anup: Before sleeping \n");	
-+		pm_pwronoff = 0;
-+		PGSR0 &= ~GPIO_bit(23);		//7  YoKu GPIO Changed
-+		//PGSR2 &= ~GPIO_bit(64);	//64 YoKu Commented in PWG500 64,7 was WifiReg, IN PWG600 it is 23
-+
-+		PGSR2 &= ~GPIO_bit(80);		//69 YoKu GPIO Changed	Anup : commnented
-+		PWER = 0x0004;			// YoKu Changed from 0x10 to 0x04 (i.e GPIO 4 -> 2)
-+		PFER = 0x0004;
-+		PRER = 0x0004;
-+
-+// YoKu ---->
-+// 11May2006 To reduce Power Off current from 7mA to 4mA
-+		GPDR0 |= GPIO_bit(16);  // BTReset o/p Low
-+        	PGSR0 &= ~GPIO_bit(16);
-+
-+		GPDR1 |= GPIO_bit(33);  // nMEC/nPDI o/p Low
-+                PGSR1 &= ~GPIO_bit(33);
-+
-+		GPDR1 |= GPIO_bit(45);  // BTRTS o/p High
-+                PGSR1 |= GPIO_bit(45);
-+
-+		
-+		GPDR1 |= GPIO_bit(43);  // BTTXD o/p High
-+                PGSR1 |= GPIO_bit(43);
-+		
-+		GPDR1 &= ~GPIO_bit(42);	// BTRXD i/p
-+		GPDR1 &= ~GPIO_bit(44);	// BTCTS i/p
-+// <---- YoKu
-+
-+		PSPR = virt_to_phys(pxa_cpu_resume);	// YoKu 29July05 to Resume from where u left, Original PSPR = 0
-+	}
-+
-+	valbefore = GPLR0 & (GPIO_bit(21) | GPIO_bit(22)) ; // 62,63 YoKu GPIO Changed
-+
-+	//printk("Anup: Before sleeping gpsr0=0x%08x gpsr1=0x%08x gpsr2= 0x%08x\n",gpsr0,gpsr1,gpsr2);	
-+	//kirti	pxa_cpu_suspend();
-+	//printk("KER_PM: Going to sleep zzzzzzzzz\n");
-+	
-+//	OSCC |= OSCC_OON; //Tushar: 18 apr. enable 32.768KHz Oscillator
-+
-+//	PCFR |= PCFR_OPDE; //Tushar: 18 apr. disable 3.6864MHz oscillator	
-+
-+	pxa_cpu_pm_enter(PM_SUSPEND_MEM);
- 
- 	cpu_init();
- 
-+	//kirti~
-+	/**/
-+	//FFMCR |=  UART_DTR ;
-+	/**/
-+
- 	/* after sleeping, validate the checksum */
- 	checksum = 0;
- 	for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
-@@ -141,39 +464,63 @@
- 	checksum = 0;
- 	for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
- 		checksum += sleep_save[i];
--
- 	/* if invalid, display message and wait for a hardware reset */
--	if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
-+	if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) 
-+	{
- #ifdef CONFIG_ARCH_LUBBOCK
- 		LUB_HEXLED = 0xbadbadc5;
- #endif
- 		while (1)
--			pxa_cpu_pm_enter(state);
-+		{
-+			printk("\n\n\nKERN_PM: CRC Error!!! after wakeup\n\n\n"); // YoKu 25May06
-+
- 	}
- 
-+	}
-+	valafter = GPLR0 & (GPIO_bit(21) | GPIO_bit(22)) ;	//62,63 YoKu GPIO Changed
-+	pm_pedr = PEDR ;
-+ 
- 	/* ensure not to come back here if it wasn't intended */
- 	PSPR = 0;
- 
-+	/*printk("YoKu: gafr0_L=0x%08x gafr0_U=0x%08x\n",GAFR0_L,GAFR0_U); 
-+	printk(" gafr1_L= 0x%08x gafr1_U= 0x%08x\n",GAFR1_L,GAFR1_U);	
-+	printk(" gafr2_L= 0x%08x gafr2_U= 0x%08x\n",GAFR2_L,GAFR2_U);	*/
- 	/* restore registers */
--	RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
- 	RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
-+	RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
-+	RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
- 	RESTORE(GAFR0_L); RESTORE(GAFR0_U);
- 	RESTORE(GAFR1_L); RESTORE(GAFR1_U);
- 	RESTORE(GAFR2_L); RESTORE(GAFR2_U);
--	RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
--	RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
--	RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
- 
--#ifdef CONFIG_PXA27x
--	RESTORE(MDREFR);
--	RESTORE_GPLEVEL(3); RESTORE(GPDR3);
--	RESTORE(GAFR3_L); RESTORE(GAFR3_U);
--	RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
--	RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
--	RESTORE(PFER); RESTORE(PKWR);
--#endif
- 
--	PSSR = PSSR_RDH | PSSR_PH;
-+	// Anup : For Wifi power saving mode 2 May 2006
-+        RESTORE(NSSCR0);RESTORE(NSSCR1);RESTORE(NSSSR);RESTORE(NSSITR);RESTORE(NSSDR);RESTORE(NSSTO);
-+        RESTORE(NSSPSP);
-+
-+	// PSSR = PSSR_PH;
-+	GPSR0 = gpsr0;
-+	GPSR1 = gpsr1;
-+	GPSR2 = gpsr2;
-+	
-+	// Anup : check values of these registers
-+//	 printk("YoKu: gpsr0=0x%08x gpsr1=0x%08x gpsr2= 0x%08x\n",gpsr0,gpsr1,gpsr2);	
-+	//sidd
-+
-+	GPCR0 |= ~gpsr0;
-+	GPCR1 |= ~gpsr1;
-+	GPCR2 |= ~gpsr2;
-+
-+	
-+	PSSR = ~PSSR_PH;
-+
-+	RESTORE(OSMR0);
-+	RESTORE(OSMR1);
-+	RESTORE(OSMR2);
-+	RESTORE(OSMR3);
-+	RESTORE(OSCR);
-+	RESTORE(OIER);
- 
- 	RESTORE(CKEN);
- 
-@@ -181,62 +528,181 @@
- 	ICCR = 1;
- 	RESTORE(ICMR);
- 
--	RESTORE(PSTR);
-+	/* 
-+	 * Temporary solution.  This won't be necessary once
-+	 * we move pxa support into the serial driver.
-+	 * Restore the FF UART.
-+	 */
-+	RESTORE(BTMCR);
-+	RESTORE(BTSPR);
-+	RESTORE(BTLCR);
-+	BTLCR |= 0x80;
-+	RESTORE(BTDLH);
-+	RESTORE(BTDLL);
-+	RESTORE(BTLCR);
-+	RESTORE(BTISR);
-+	BTFCR = 0xc7;
-+	RESTORE(BTIER);
-+
-+	RESTORE(STMCR);
-+	RESTORE(STSPR);
-+	RESTORE(STLCR);
-+	STLCR |= 0x80;
-+	RESTORE(STDLH);
-+	RESTORE(STDLL);
-+	RESTORE(STLCR);
-+	RESTORE(STISR);
-+	STFCR = 0xc7;
-+	RESTORE(STIER);
-+
-+	RESTORE(FFMCR);
-+	RESTORE(FFSPR);
-+	RESTORE(FFLCR);
-+	FFLCR |= 0x80;
-+	RESTORE(FFDLH);
-+	RESTORE(FFDLL);
-+	RESTORE(FFLCR);
-+	RESTORE(FFISR);
-+	RESTORE(FFFCR);
-+	FFFCR = 0xc7;
-+	RESTORE(FFIER);
-+
-+	 // YoKu 23Feb06 Added To save LCD Registers, updated by kirti 24Feb06 ----->
-+        RESTORE(LCCR3); RESTORE(LCCR2); RESTORE(LCCR1); 
-+	LCCR0=RESTORE(LCCR0) & ~LCCR0_ENB;
-+        RESTORE(FDADR0); RESTORE(FDADR1);
-+	LCCR0 |= LCCR0_ENB;
-+	
-+        // <----- YoKu
- 
- 	/* restore current time */
--	rtc.tv_sec = RCNR;
--	restore_time_delta(&delta, &rtc);
-+	xtime.tv_sec = RCNR;
-+
-+	valafter1 = GPLR0 & (GPIO_bit(21) | GPIO_bit(22)) ;	//62,63 YoKu GPIO Changed
-+
-+//	SSCR0 &=0xFFFFFFFF;
-+//	printk("\nPM : val of SSCR0 = %x " , SSCR0);
-+
-+	printk("KER_PM: Resumed at RCNR = %d RTSR= %x\n",RCNR,RTSR);
-+
-+	printk("YoKu: pgsr0=0x%08x pgsr1=0x%08x pgsr2= 0x%08x\n",PGSR0,PGSR1,PGSR2);
-+
-+	OSMR0 = 0;		/* set initial match at 0 */
-+	OSSR = 0xf;		/* clear status on all timers */
-+	OIER |= OIER_E0;	/* enable match on timer 0 to cause interrupts */
-+	OSCR = 0;		/* initialize free-running timer, force first match */
-+
-+	leds_event(led_start);
-+	//kirti	sti();
-+	// call i2c reset here---->
-+	ICR = ICR_UR;
-+	ISR = 0x7FF; //I2C_ISR_INIT;
-+	ICR &= ~ICR_UR;
-+
-+	ISAR = 0x32;//i2c->slave_addr;
-+
-+	/* set control register values */
-+	ICR = (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE);//I2C_ICR_INIT;
-+
-+	/* enable unit */
-+	ICR |= ICR_IUE;
-+	udelay(100);
-+	//<-----
-+
-+	local_irq_enable();
- 
--#ifdef DEBUG
--	printk(KERN_DEBUG "*** made it back from resume\n");
--#endif
- 
- 	return 0;
- }
- 
--EXPORT_SYMBOL_GPL(pxa_pm_enter);
--
- unsigned long sleep_phys_sp(void *sp)
- {
- 	return virt_to_phys(sp);
- }
- 
-+#ifdef CONFIG_SYSCTL
- /*
-- * Called after processes are frozen, but before we shut down devices.
-+ * ARGH!  ACPI people defined CTL_ACPI in linux/acpi.h rather than
-+ * linux/sysctl.h.
-+ *
-+ * This means our interface here won't survive long - it needs a new
-+ * interface.  Quick hack to get this working - use sysctl id 9999.
-  */
--int pxa_pm_prepare(suspend_state_t state)
--{
--	extern int pxa_cpu_pm_prepare(suspend_state_t state);
-+#warning ACPI broke the kernel, this interface needs to be fixed up.
-+#define CTL_ACPI 9999
-+#define ACPI_S1_SLP_TYP 19
- 
--	return pxa_cpu_pm_prepare(state);
-+/*
-+ * Send us to sleep.
-+ */
-+static int sysctl_pm_do_suspend(ctl_table *ctl, int write, struct file *filp,
-+		void *buffer, size_t *lenp)
-+{
-+	int retval=0;
-+	unsigned i , clock ;  
-+	if (write) 
-+	{
-+		char buf[16], *p;
-+		unsigned int sleepsec;
-+		int len,left = *lenp;
-+
-+		len = left;
-+		if (left > sizeof(buf))
-+			left = sizeof(buf);
-+		if (!copy_from_user(buf, buffer, left))
-+		{
-+			buf[sizeof(buf) - 1] = '\0';
-+			sleepsec = simple_strtoul(buf, &p, 0);
-+			printk("\nSleeping %d Pwronoff=%x RCNR=%d\n",sleepsec,pm_pwronoff,RCNR);
-+			printk("\nPWER %x PFER=%x PRER=%x\n",PWER,PFER,PRER);
-+			RTAR = xtime.tv_sec + sleepsec;
-+			printk("\nRTAR=%d \n",RTAR);
-+		}
-+	}
-+	retval = pm_do_suspend();
-+	clock = get_memclk_frequency_10khz();
-+	return retval;
- }
--
--EXPORT_SYMBOL_GPL(pxa_pm_prepare);
- 
- /*
-- * Called after devices are re-setup, but before processes are thawed.
-+static struct ctl_table pm_table[] =
-+{
-+	{ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, (proc_handler *)&sysctl_pm_do_suspend},
-+	{0}
-+};
-  */
--int pxa_pm_finish(suspend_state_t state)
-+static struct ctl_table pm_table[] =
- {
--	return 0;
-+	{ 
-+	ctl_name:	ACPI_S1_SLP_TYP, 
-+	procname: 	"suspend", 
-+	mode: 		0600, 
-+	proc_handler:	(proc_handler *)&sysctl_pm_do_suspend,
-+	},
-+	{
-+	ctl_name: 0
- }
-+};
- 
--EXPORT_SYMBOL_GPL(pxa_pm_finish);
-+static struct ctl_table pm_dir_table[] =
-+{
-+	{CTL_ACPI, "pm", NULL, 0, 0555, pm_table},
-+	{0}
-+};
- 
- /*
-- * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
-+ * Initialize power interface
-  */
--static struct pm_ops pxa_pm_ops = {
--	.pm_disk_mode	= PM_DISK_FIRMWARE,
--	.prepare	= pxa_pm_prepare,
--	.enter		= pxa_pm_enter,
--	.finish		= pxa_pm_finish,
--};
--
--static int __init pxa_pm_init(void)
-+static int __init pm_init(void)
- {
--	pm_set_ops(&pxa_pm_ops);
-+	register_sysctl_table(pm_dir_table, 1);
-+        /*Adi: Adjust for clock value to RTC
-+        RTTR = RTC clk - 1*/
-+        RTTR = 32913;
-+
- 	return 0;
- }
- 
--device_initcall(pxa_pm_init);
-+__initcall(pm_init);
-+
-+#endif
-diff -NurbwB linux-2.6.17/arch/arm/mach-pxa/sleep.S linux-2.6.17-patched/arch/arm/mach-pxa/sleep.S
---- linux-2.6.17/arch/arm/mach-pxa/sleep.S	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/arch/arm/mach-pxa/sleep.S	2006-09-11 13:07:05.000000000 -0700
-@@ -79,7 +79,7 @@
- 	ldr	r5, [r4]
- 
- 	@ enable SDRAM self-refresh mode
--	orr	r5, r5, #MDREFR_SLFRSH
-+	orr	r5, r5, #(MDREFR_SLFRSH | MDREFR_APD)
- 
- #ifdef CONFIG_PXA27x
- 	@ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
-diff -NurbwB linux-2.6.17/include/asm-arm/arch-pxa/pxa-regs.h linux-2.6.17-patched/include/asm-arm/arch-pxa/pxa-regs.h
---- linux-2.6.17/include/asm-arm/arch-pxa/pxa-regs.h	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/include/asm-arm/arch-pxa/pxa-regs.h	2006-09-11 11:04:36.000000000 -0700
-@@ -1748,6 +1748,15 @@
- #define SSTO_P(x) (*(((x) == 1) ? &SSTO_P1 : ((x) == 2) ? &SSTO_P2 : ((x) == 3) ? &SSTO_P3 : NULL))
- #define SSPSP_P(x) (*(((x) == 1) ? &SSPSP_P1 : ((x) == 2) ? &SSPSP_P2 : ((x) == 3) ? &SSPSP_P3 : NULL))
- 
-+#define NSSCR0          __REG(0x41400000)  /* SSP Port 1 Control Register 0 */
-+#define NSSCR1          __REG(0x41400004)  /* SSP Port 1 Control Register 1 */
-+#define NSSSR           __REG(0x41400008)  /* SSP Port 1 Status Register */
-+#define NSSITR          __REG(0x4140000C)  /* SSP Port 1 Interrupt Test Register */
-+#define NSSDR           __REG(0x41400010)  /* (Write / Read) SSP Port 1 Data Write Register/SSP Data Read Register */
-+#define NSSTO           __REG(0x41400028)  /* SSP Port 1 Time Out Register */
-+#define NSSPSP          __REG(0x4140002C)  /* SSP Port 1 Programmable Serial Port Register */
-+
-+
- /*
-  * MultiMediaCard (MMC) controller
-  */
-diff -NurbwB linux-2.6.17/kernel/power/main.c linux-2.6.17-patched/kernel/power/main.c
---- linux-2.6.17/kernel/power/main.c	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/kernel/power/main.c	2006-09-11 12:59:20.000000000 -0700
-@@ -66,10 +66,12 @@
- 		goto Enable_cpu;
- 	}
- 
-+	/*
- 	if (freeze_processes()) {
- 		error = -EAGAIN;
- 		goto Thaw;
- 	}
-+	*/
- 
- 	if ((free_pages = nr_free_pages()) < FREE_PAGE_NUMBER) {
- 		pr_debug("PM: free some memory\n");
-@@ -110,12 +112,15 @@
- 
- 	local_irq_save(flags);
- 
-+	/*
- 	if ((error = device_power_down(PMSG_SUSPEND))) {
- 		printk(KERN_ERR "Some devices failed to power down\n");
- 		goto Done;
- 	}
-+	*/
-+
- 	error = pm_ops->enter(state);
--	device_power_up();
-+	//device_power_up();
-  Done:
- 	local_irq_restore(flags);
- 	return error;
diff --git a/target/linux/pxa/patches/002-usb_gadget.patch b/target/linux/pxa/patches/002-usb_gadget.patch
deleted file mode 100644
index b6766d9b3b..0000000000
--- a/target/linux/pxa/patches/002-usb_gadget.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-diff -NurbwB linux-2.6.17/drivers/usb/gadget/pxa2xx_udc.c linux-2.6.17-patched/drivers/usb/gadget/pxa2xx_udc.c
---- linux-2.6.17/drivers/usb/gadget/pxa2xx_udc.c	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/usb/gadget/pxa2xx_udc.c	2006-09-11 13:02:39.000000000 -0700
-@@ -87,8 +87,8 @@
- static const char ep0name [] = "ep0";
- 
- 
--// #define	USE_DMA
--// #define	USE_OUT_DMA
-+#define	USE_DMA
-+#define	USE_OUT_DMA
- // #define	DISABLE_TEST_MODE
- 
- #ifdef CONFIG_ARCH_IXP4XX
-@@ -1513,7 +1513,7 @@
- #endif
- 
- 	/* try to clear these bits before we enable the udc */
--	udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
-+	udc_ack_int_UDCCR(UDCCR_SUSIR|UDCCR_RSTIR|UDCCR_RESIR);
- 
- 	ep0_idle(dev);
- 	dev->gadget.speed = USB_SPEED_UNKNOWN;
-@@ -2043,6 +2043,9 @@
- 	struct pxa2xx_udc	*dev = _dev;
- 	int			handled;
- 
-+
-+	udc_set_mask_UDCCR( UDCCR_REM | UDCCR_SRM);
-+
- 	dev->stats.irqs++;
- 	HEX_DISPLAY(dev->stats.irqs);
- 	do {
-@@ -2137,6 +2139,8 @@
- 		/* we could also ask for 1 msec SOF (SIR) interrupts */
- 
- 	} while (handled);
-+
-+	udc_clear_mask_UDCCR( UDCCR_SRM | UDCCR_REM);
- 	return IRQ_HANDLED;
- }
- 
-@@ -2437,6 +2441,7 @@
- 	int retval, out_dma = 1;
- 	u32 chiprev;
- 
-+	local_irq_disable();
- 	/* insist on Intel/ARM/XScale */
- 	asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
- 	if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
-@@ -2553,6 +2558,7 @@
- #endif
- 	}
- #endif
-+	local_irq_enable();
- 	create_proc_files();
- 
- 	return 0;
diff --git a/target/linux/pxa/patches/002-verdex_lcd_support.patch b/target/linux/pxa/patches/002-verdex_lcd_support.patch
new file mode 100644
index 0000000000..8349307033
--- /dev/null
+++ b/target/linux/pxa/patches/002-verdex_lcd_support.patch
@@ -0,0 +1,52 @@
+From eb92a178eceae4e5d18bbb442b8e44cb88457d60 Mon Sep 17 00:00:00 2001
+From: Joseph Kortje <jpktech@rogers.com>
+Date: Wed, 28 Oct 2009 21:25:57 -0400
+Subject: [PATCH] [ARM] Gumstix Verdex LCD config options
+
+add options to Kconfig for Verdex LCD support
+
+Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
+---
+ drivers/video/Kconfig |   31 +++++++++++++++++++++++++++++++
+ 1 files changed, 31 insertions(+), 0 deletions(-)
+
+--- a/drivers/video/Kconfig
++++ b/drivers/video/Kconfig
+@@ -1772,6 +1772,37 @@ config FB_PXA
+ 	  say M here and read <file:Documentation/kbuild/modules.txt>.
+ 
+ 	  If unsure, say N.
++choice
++	depends on FB_PXA
++	prompt "LCD Panel"
++	default FB_PXA_SAMSUNG_LTE430WQ_F0C
++
++config FB_PXA_ALPS_CDOLLAR
++	boolean "Chris Dollar's ALPS screen"
++	---help---
++	  Enable definitions (over-ridable on the kernel command line if
++	  "PXA LCD command line parameters" is also selected) for an ALPS
++	  screen which Chris Dollar uses
++
++config FB_PXA_SHARP_LQ043_PSP
++	boolean "SHARP LQ043... series"
++	---help---
++	  Enable definitions (over-ridable on the kernel command line if
++	  "PXA LCD command line parameters" is also selected) for a SHARP
++	  LQ043... screen, such as the one used by the PSP.  These screens are
++	  the ones normally sold by gumstix with its boards.
++
++config FB_PXA_SAMSUNG_LTE430WQ_F0C
++	boolean "Samsung LTE430WQ-F0C (standard gumstix LCD)"
++	---help---
++	  Enable definitions for a Samsung LTE430WQ-F0C LCD panel, such as the ones resold
++	  by gumstix for use with their "LCD-Ready" boards.
++
++config FB_PXA_NONEOFTHEABOVE
++	boolean "None of the above"
++
++endchoice
++
+ 
+ config FB_PXA_OVERLAY
+ 	bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"
diff --git a/target/linux/pxa/patches/003-gumstix_h_verdex_pro_support.patch b/target/linux/pxa/patches/003-gumstix_h_verdex_pro_support.patch
new file mode 100644
index 0000000000..570a40354c
--- /dev/null
+++ b/target/linux/pxa/patches/003-gumstix_h_verdex_pro_support.patch
@@ -0,0 +1,211 @@
+From adb6abbe4e3bc17c20cdc70e4a4357f1633d4970 Mon Sep 17 00:00:00 2001
+From: Joseph Kortje <jpktech@rogers.com>
+Date: Wed, 28 Oct 2009 21:49:11 -0400
+Subject: [PATCH] [ARM] gumstix.h: Verdex Pro support
+
+Added a bunch of ifdefs to support both original gumstix boards
+as well as the Verdex Pro in gumstix.h
+
+Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
+---
+ arch/arm/mach-pxa/include/mach/gumstix.h |  160 ++++++++++++++++++++++++------
+ 1 files changed, 130 insertions(+), 30 deletions(-)
+
+--- a/arch/arm/mach-pxa/include/mach/gumstix.h
++++ b/arch/arm/mach-pxa/include/mach/gumstix.h
+@@ -6,6 +6,9 @@
+  * published by the Free Software Foundation.
+  */
+ 
++#if !defined(__ASM_ARCH_MFP_PXA27X_H) && !defined(__ASM_ARCH_MFP_PXA25X_H)
++	#error You need to include either mfp-pxa27x.h or mfp-pxa25x.h
++#endif
+ 
+ /* BTRESET - Reset line to Bluetooth module, active low signal. */
+ #define GPIO_GUMSTIX_BTRESET          7
+@@ -28,9 +31,18 @@ has detected a cable insertion; driven l
+ 
+ #else
+ 
++#ifndef CONFIG_MACH_GUMSTIX_VERDEX
++
+ #define GPIO_GUMSTIX_USB_GPIOn		35
+ #define GPIO_GUMSTIX_USB_GPIOx		41
+ 
++#else
++
++#define GPIO_GUMSTIX_USB_GPIOn		100
++#define GPIO_GUMSTIX_USB_GPIOx		27
++
++#endif
++
+ #endif
+ 
+ /* usb state change */
+@@ -52,48 +64,136 @@ has detected a cable insertion; driven l
+  * ETH_RST provides a hardware reset line to the ethernet chip
+  * ETH is the IRQ line in from the ethernet chip to the PXA
+  */
++#ifndef CONFIG_MACH_GUMSTIX_VERDEX
+ #define GPIO_GUMSTIX_ETH0_RST		80
+-#define GPIO_GUMSTIX_ETH0_RST_MD	(GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
++#define GPIO_GUMSTIX_ETH0		36
++#else
++#define GPIO_GUMSTIX_ETH0_RST		107
++#define GPIO_GUMSTIX_ETH0		99
++#endif
+ #define GPIO_GUMSTIX_ETH1_RST		52
+-#define GPIO_GUMSTIX_ETH1_RST_MD	(GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
++#define GPIO_GUMSTIX_ETH1		27
+ 
+-#define GPIO_GUMSTIX_ETH0		36
++#define GPIO_GUMSTIX_ETH0_RST_MD	(GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
++#define GPIO_GUMSTIX_ETH1_RST_MD	(GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
+ #define GPIO_GUMSTIX_ETH0_MD		(GPIO_GUMSTIX_ETH0 | GPIO_IN)
+-#define GUMSTIX_ETH0_IRQ		IRQ_GPIO(GPIO_GUMSTIX_ETH0)
+-#define GPIO_GUMSTIX_ETH1		27
+ #define GPIO_GUMSTIX_ETH1_MD		(GPIO_GUMSTIX_ETH1 | GPIO_IN)
+-#define GUMSTIX_ETH1_IRQ		IRQ_GPIO(GPIO_GUMSTIX_ETH1)
+ 
++#define GUMSTIX_ETH0_IRQ		IRQ_GPIO(GPIO_GUMSTIX_ETH0)
++#define GUMSTIX_ETH1_IRQ		IRQ_GPIO(GPIO_GUMSTIX_ETH1)
+ 
+ /* CF reset line */
+-#define GPIO8_RESET			8
++#define GPIO8_CF_RESET			8
++#define GPIO97_CF_RESET			97
++#define GPIO110_CF_RESET		110
++
++#ifndef CONFIG_MACH_GUMSTIX_VERDEX
++#define GPIO_GUMSTIX_CF_RESET		GPIO8_CF_RESET
++#else
++#define GPIO_GUMSTIX_CF_RESET		GPIO97_CF_RESET
++#endif
++
++#define GPIO_GUMSTIX_CF_OLD_RESET	GPIO110_CF_RESET
++
++/* CF signals shared by both sockets */
++#define GPIO_GUMSTIX_nPOE	48
++#define GPIO_GUMSTIX_nPWE	49
++#define GPIO_GUMSTIX_nPIOR	50
++#define GPIO_GUMSTIX_nPIOW	51
++
++#ifndef CONFIG_MACH_GUMSTIX_VERDEX
++#define GPIO_GUMSTIX_nPCE_1	52
++#define GPIO_GUMSTIX_nPCE_2	53
++#define GPIO_GUMSTIX_pSKTSEL	54
++#else
++#define GPIO_GUMSTIX_nPCE_1	102
++#define GPIO_GUMSTIX_nPCE_2	105
++#define GPIO_GUMSTIX_pSKTSEL	79
++#endif
++
++#define GPIO_GUMSTIX_nPREG	55
++#define GPIO_GUMSTIX_nPWAIT	56
++#define GPIO_GUMSTIX_nIOIS16	57
++
++/* Pin mode definitions correspond to mfp-pxa2[57]x.h */
++#define GPIO_GUMSTIX_nPOE_MD	GPIO48_nPOE
++#define GPIO_GUMSTIX_nPWE_MD	GPIO49_nPWE
++#define GPIO_GUMSTIX_nPIOR_MD	GPIO50_nPIOR
++#define GPIO_GUMSTIX_nPIOW_MD	GPIO51_nPIOW
++
++#ifndef CONFIG_MACH_GUMSTIX_VERDEX
++#define GPIO_GUMSTIX_nPCE_1_MD	GPIO52_nPCE_1
++#define GPIO_GUMSTIX_nPCE_2_MD	GPIO53_nPCE_2
++#define GPIO_GUMSTIX_pSKTSEL_MD	GPIO54_pSKTSEL
++#else
++#define GPIO_GUMSTIX_nPCE_1_MD	GPIO102_nPCE_1
++#define GPIO_GUMSTIX_nPCE_2_MD	GPIO105_nPCE_2
++#define GPIO_GUMSTIX_pSKTSEL_MD	GPIO79_pSKTSEL
++#endif
++
++#define GPIO_GUMSTIX_nPREG_MD	GPIO55_nPREG
++#define GPIO_GUMSTIX_nPWAIT_MD	GPIO56_nPWAIT
++#define GPIO_GUMSTIX_nIOIS16_MD	GPIO57_nIOIS16
+ 
+ /* CF slot 0 */
+-#define GPIO4_nBVD1			4
+-#define GPIO4_nSTSCHG			GPIO4_nBVD1
+-#define GPIO11_nCD			11
+-#define GPIO26_PRDY_nBSY		26
+-#define GUMSTIX_S0_nSTSCHG_IRQ		IRQ_GPIO(GPIO4_nSTSCHG)
+-#define GUMSTIX_S0_nCD_IRQ		IRQ_GPIO(GPIO11_nCD)
+-#define GUMSTIX_S0_PRDY_nBSY_IRQ	IRQ_GPIO(GPIO26_PRDY_nBSY)
++#define GPIO4_nBVD1_0			4
++#define GPIO4_nSTSCHG_0			GPIO4_nBVD1_0
++#define GPIO11_nCD_0			11
++#define GPIO26_PRDY_nBSY_0		26
++
++#define GPIO111_nBVD1_0			111
++#define GPIO111_nSTSCHG_0		GPIO111_nBVD1_0
++#define GPIO104_nCD_0			104
++#define GPIO96_PRDY_nBSY_0		96
++#define GPIO109_PRDY_nBSY_0		109
++
++#ifndef CONFIG_MACH_GUMSTIX_VERDEX
++#define GPIO_GUMSTIX_nBVD1_0		GPIO4_nBVD1_0
++#define GPIO_GUMSTIX_nSTSCHG_0		GPIO4_nSTSCHG_0
++#define GPIO_GUMSTIX_nCD_0		GPIO11_nCD_0
++#define GPIO_GUMSTIX_PRDY_nBSY_0	GPIO26_PRDY_nBSY_0
++#else
++#define GPIO_GUMSTIX_nBVD1_0		GPIO111_nBVD1_0
++#define GPIO_GUMSTIX_nSTSCHG_0		GPIO111_nSTSCHG_0
++#define GPIO_GUMSTIX_nCD_0		GPIO104_nCD_0
++#define GPIO_GUMSTIX_PRDY_nBSY_0	GPIO96_PRDY_nBSY_0
++#endif
++
++#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD	GPIO109_PRDY_nBSY_0
++
++#define GUMSTIX_S0_nSTSCHG_IRQ		IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_0)
++#define GUMSTIX_S0_nCD_IRQ		IRQ_GPIO(GPIO_GUMSTIX_nCD_0)
++#define GUMSTIX_S0_PRDY_nBSY_IRQ	IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0)
++#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ	IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0_OLD)
+ 
+ /* CF slot 1 */
+-#define GPIO18_nBVD1			18
+-#define GPIO18_nSTSCHG			GPIO18_nBVD1
+-#define GPIO36_nCD			36
+-#define GPIO27_PRDY_nBSY		27
+-#define GUMSTIX_S1_nSTSCHG_IRQ		IRQ_GPIO(GPIO18_nSTSCHG)
+-#define GUMSTIX_S1_nCD_IRQ		IRQ_GPIO(GPIO36_nCD)
+-#define GUMSTIX_S1_PRDY_nBSY_IRQ	IRQ_GPIO(GPIO27_PRDY_nBSY)
+-
+-/* CF GPIO line modes */
+-#define GPIO4_nSTSCHG_MD		(GPIO4_nSTSCHG | GPIO_IN)
+-#define GPIO8_RESET_MD			(GPIO8_RESET | GPIO_OUT)
+-#define GPIO11_nCD_MD			(GPIO11_nCD | GPIO_IN)
+-#define GPIO18_nSTSCHG_MD		(GPIO18_nSTSCHG | GPIO_IN)
+-#define GPIO26_PRDY_nBSY_MD		(GPIO26_PRDY_nBSY | GPIO_IN)
+-#define GPIO27_PRDY_nBSY_MD		(GPIO27_PRDY_nBSY | GPIO_IN)
+-#define GPIO36_nCD_MD			(GPIO36_nCD | GPIO_IN)
++#define GPIO18_nBVD1_1			18
++#define GPIO18_nSTSCHG_1		GPIO18_nBVD1_1
++#define GPIO36_nCD_1			36
++#define GPIO27_PRDY_nBSY_1		27
++
++#define GPIO_GUMSTIX_nBVD1_1		GPIO18_nBVD1_1
++#define GPIO_GUMSTIX_nSTSCHG_1		GPIO18_nSTSCHG_1
++#define GPIO_GUMSTIX_nCD_1		GPIO36_nCD_1
++#define GPIO_GUMSTIX_PRDY_nBSY_1	GPIO27_PRDY_nBSY_1
++
++#define GUMSTIX_S1_nSTSCHG_IRQ		IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_1)
++#define GUMSTIX_S1_nCD_IRQ		IRQ_GPIO(GPIO_GUMSTIX_nCD_1)
++#define GUMSTIX_S1_PRDY_nBSY_IRQ	IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_1)
++
++/* CF GPIO line modes - correspond to mfp-pxa2[57]x.h */
++#define GPIO_GUMSTIX_CF_RESET_MD	( GPIO_GUMSTIX_CF_RESET | GPIO_OUT )
++#define GPIO_GUMSTIX_CF_OLD_RESET_MD	( GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT )
++
++#define GPIO_GUMSTIX_nSTSCHG_0_MD	GPIO111_GPIO
++#define GPIO_GUMSTIX_nCD_0_MD		GPIO104_GPIO
++
++#define GPIO_GUMSTIX_PRDY_nBSY_0_MD	GPIO96_GPIO
++#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD	GPIO109_GPIO
++
++#define GPIO_GUMSTIX_nSTSCHG_1_MD	GPIO18_GPIO
++#define GPIO_GUMSTIX_nCD_1_MD		GPIO36_GPIO
++#define GPIO_GUMSTIX_PRDY_nBSY_1_MD	GPIO27_GPIO
+ 
+ /* for expansion boards that can't be programatically detected */
+ extern int am200_init(void);
diff --git a/target/linux/pxa/patches/004-skbuf_hack.patch b/target/linux/pxa/patches/004-skbuf_hack.patch
deleted file mode 100644
index 434e3b98b1..0000000000
--- a/target/linux/pxa/patches/004-skbuf_hack.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- linux-2.6.17/include/linux/skbuff.h	2006-09-20 16:13:42.000000000 -0700
-+++ linux-2.6.17-patched/include/linux/skbuff.h	2006-09-20 16:14:29.000000000 -0700
-@@ -239,6 +239,7 @@
- 	} nh;
- 
- 	union {
-+		struct ethhdr   *ethernet;
- 	  	unsigned char 	*raw;
- 	} mac;
- 
diff --git a/target/linux/pxa/patches/004-smsc911x_verdex_pro_support.patch b/target/linux/pxa/patches/004-smsc911x_verdex_pro_support.patch
new file mode 100644
index 0000000000..82490b33b4
--- /dev/null
+++ b/target/linux/pxa/patches/004-smsc911x_verdex_pro_support.patch
@@ -0,0 +1,102 @@
+From 7645a459feb02f7aae4c3a5724b7800495d1b659 Mon Sep 17 00:00:00 2001
+From: Bobby Powers <bobbypowers@gmail.com>
+Date: Wed, 28 Oct 2009 22:41:31 -0400
+Subject: [PATCH] [ARM] smsc911x: Verdex Pro support
+
+Basically Joseph Kortje's patch, cleaned up to apply to Linus's
+tree.  Some of the smsc911x.c had been applied already
+
+Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
+---
+ drivers/net/smsc911x.c   |   50 +++++++++++++++++++++++++++++++++++++--------
+ drivers/net/smsc911x.h   |    2 +-
+ include/linux/smsc911x.h |   11 ++++++++++
+ 3 files changed, 53 insertions(+), 10 deletions(-)
+
+--- a/drivers/net/smsc911x.c
++++ b/drivers/net/smsc911x.c
+@@ -1181,7 +1181,7 @@ static int smsc911x_open(struct net_devi
+ 		SMSC_WARNING(IFUP,
+ 			"Timed out waiting for EEPROM busy bit to clear");
+ 
+-	smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
++ 	smsc911x_reg_write(pdata, GPIO_CFG, GPIO_CFG_LED1_EN_ | GPIO_CFG_LED2_EN_ | (1 << 20));
+ 
+ 	/* The soft reset above cleared the device's MAC address,
+ 	 * restore it from local copy (set in probe) */
+@@ -1193,8 +1193,8 @@ static int smsc911x_open(struct net_devi
+ 	smsc911x_reg_write(pdata, INT_EN, 0);
+ 	smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
+ 
+-	/* Set interrupt deassertion to 100uS */
+-	intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
++ 	/* Set interrupt deassertion to 22*10uS */
++ 	intcfg = ((22 << 24) | INT_CFG_IRQ_EN_);
+ 
+ 	if (pdata->config.irq_polarity) {
+ 		SMSC_TRACE(IFUP, "irq polarity: active high");
+@@ -1220,7 +1220,7 @@ static int smsc911x_open(struct net_devi
+ 	temp |= INT_EN_SW_INT_EN_;
+ 	smsc911x_reg_write(pdata, INT_EN, temp);
+ 
+-	timeout = 1000;
++	timeout = 2000;
+ 	while (timeout--) {
+ 		if (pdata->software_irq_signal)
+ 			break;
+@@ -1948,6 +1948,38 @@ static int __devexit smsc911x_drv_remove
+ 	return 0;
+ }
+ 
++static inline unsigned int is_gumstix_oui(u8 *addr)
++{
++	return (addr[0] == 0x00 && addr[1] == 0x15 && addr[2] == 0xC9);
++}
++
++/**
++ * gen_serial_ether_addr - Generate software assigned Ethernet address
++ * based on the system_serial number
++ * @addr: Pointer to a six-byte array containing the Ethernet address
++ *
++ * Generate an Ethernet address (MAC) that is not multicast
++ * and has the local assigned bit set, keyed on the system_serial
++ */
++static inline void gen_serial_ether_addr(u8 *addr)
++{
++	static u8 ether_serial_digit = 0;
++	addr [0] = system_serial_high >> 8;
++	addr [1] = system_serial_high;
++	addr [2] = system_serial_low >> 24;
++	addr [3] = system_serial_low >> 16;
++	addr [4] = system_serial_low >> 8;
++	addr [5] = (system_serial_low & 0xc0) |	/* top bits are from system serial */
++		(1 << 4) |			/* 2 bits identify interface type 1=ether, 2=usb, 3&4 undef */
++		((ether_serial_digit++) & 0x0f);	/* 15 possible interfaces of each type */
++
++	if(!is_gumstix_oui(addr))
++	{
++		addr [0] &= 0xfe;		/* clear multicast bit */
++		addr [0] |= 0x02;		/* set local assignment bit (IEEE802) */
++	}
++}
++
+ static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
+ {
+ 	struct net_device *dev;
+@@ -2081,11 +2113,11 @@ static int __devinit smsc911x_drv_probe(
+ 			SMSC_TRACE(PROBE,
+ 				"Mac Address is read from LAN911x EEPROM");
+ 		} else {
+-			/* eeprom values are invalid, generate random MAC */
+-			random_ether_addr(dev->dev_addr);
+-			smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
+-			SMSC_TRACE(PROBE,
+-				"MAC Address is set to random_ether_addr");
++			/* eeprom values are invalid, generate MAC from serial number */
++			gen_serial_ether_addr(dev->dev_addr);
++  			smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
++  			SMSC_TRACE(PROBE,
++				"MAC Address is derived from system serial number");
+ 		}
+ 	}
+ 
diff --git a/target/linux/pxa/patches/005-mtd.patch b/target/linux/pxa/patches/005-mtd.patch
deleted file mode 100644
index 6156b6a930..0000000000
--- a/target/linux/pxa/patches/005-mtd.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-diff -Nurb linux-2.6.17/drivers/mtd/chips/cfi_cmdset_0001.c linux-2.6.17-patched/drivers/mtd/chips/cfi_cmdset_0001.c
---- linux-2.6.17/drivers/mtd/chips/cfi_cmdset_0001.c	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/mtd/chips/cfi_cmdset_0001.c	2006-09-25 11:27:06.000000000 -0700
-@@ -40,7 +40,7 @@
- /* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
- 
- // debugging, turns off buffer write mode if set to 1
--#define FORCE_WORD_WRITE 0
-+#define FORCE_WORD_WRITE 1
- 
- #define MANUFACTURER_INTEL	0x0089
- #define I82802AB	0x00ad
-diff -Nurb linux-2.6.17/drivers/mtd/maps/lubbock-flash.c linux-2.6.17-patched/drivers/mtd/maps/lubbock-flash.c
---- linux-2.6.17/drivers/mtd/maps/lubbock-flash.c	2006-06-17 18:49:35.000000000 -0700
-+++ linux-2.6.17-patched/drivers/mtd/maps/lubbock-flash.c	2006-09-25 10:50:08.000000000 -0700
-@@ -26,6 +26,7 @@
- #include <asm/hardware.h>
- #include <asm/arch/pxa-regs.h>
- #include <asm/arch/lubbock.h>
-+#include <linux/mtd/concat.h>
- 
- 
- #define ROM_ADDR	0x00000000
-@@ -48,24 +49,27 @@
- 	.inval_cache = 	lubbock_map_inval_cache,
- } };
- 
--static struct mtd_partition lubbock_partitions[] = {
-+static struct mtd_partition lubbock_partitions[] =
-+{
- 	{
--		.name =		"Bootloader",
--		.size =		0x00040000,
--		.offset =	0,
--		.mask_flags =	MTD_WRITEABLE  /* force read-only */
--	},{
--		.name =		"Kernel",
--		.size =		0x00100000,
--		.offset =	0x00040000,
--	},{
--		.name =		"Filesystem",
--		.size =		MTDPART_SIZ_FULL,
--		.offset =	0x00140000
--	}
-+		.name   =   "root",
-+		.offset =   0x00410000
-+	},
-+	{
-+		.name   =  "kernel",
-+		.size   =  0x00150000,
-+		.offset =  0x000B0000
-+	},
-+	{
-+		.name   =  "bootloader",
-+		.size   =  0x000B0000,
-+		.offset =  0x00000000
-+	},
- };
- 
-+
- static struct mtd_info *mymtds[2];
-+static struct mtd_info *merged_mtd;
- static struct mtd_partition *parsed_parts[2];
- static int nr_parsed_parts[2];
- 
-@@ -83,8 +87,8 @@
- 	printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n",
- 	       flashboot?"Flash":"ROM", flashboot);
- 
--	lubbock_maps[flashboot^1].name = "Lubbock Application Flash";
--	lubbock_maps[flashboot].name = "Lubbock Boot ROM";
-+	lubbock_maps[flashboot^1].name = "Flash-1";
-+	lubbock_maps[flashboot].name = "Flash-0";
- 
- 	for (i = 0; i < 2; i++) {
- 		lubbock_maps[i].virt = ioremap(lubbock_maps[i].phys, WINDOW_SIZE);
-@@ -125,25 +129,23 @@
- 	if (!mymtds[0] && !mymtds[1])
- 		return ret;
- 
--	for (i = 0; i < 2; i++) {
--		if (!mymtds[i]) {
--			printk(KERN_WARNING "%s is absent. Skipping\n", lubbock_maps[i].name);
--		} else if (nr_parsed_parts[i]) {
--			add_mtd_partitions(mymtds[i], parsed_parts[i], nr_parsed_parts[i]);
--		} else if (!i) {
--			printk("Using static partitions on %s\n", lubbock_maps[i].name);
--			add_mtd_partitions(mymtds[i], lubbock_partitions, ARRAY_SIZE(lubbock_partitions));
--		} else {
--			printk("Registering %s as whole device\n", lubbock_maps[i].name);
--			add_mtd_device(mymtds[i]);
--		}
--	}
-+	if (mymtds[0] && mymtds[1]) {
-+		merged_mtd = mtd_concat_create(mymtds, 2, "Concated Flash #1 and #2");
-+		if(merged_mtd)
-+			add_mtd_partitions(merged_mtd, lubbock_partitions, ARRAY_SIZE(lubbock_partitions));
-+		else
-+			printk("YoKu: Failed to concate\n");
- 	return 0;
-+	}
- }
- 
- static void __exit cleanup_lubbock(void)
- {
- 	int i;
-+
-+	del_mtd_partitions(merged_mtd);
-+	map_destroy(merged_mtd);
-+
- 	for (i = 0; i < 2; i++) {
diff --git a/target/linux/pxa/patches/005-verdex_pcmcia_support.patch b/target/linux/pxa/patches/005-verdex_pcmcia_support.patch
new file mode 100644
index 0000000000..ca50022c67
--- /dev/null
+++ b/target/linux/pxa/patches/005-verdex_pcmcia_support.patch
@@ -0,0 +1,234 @@
+From 76a102bd5c9d792db19c6c72eafdecea0311a0c9 Mon Sep 17 00:00:00 2001
+From: Craig Hughes <craig@gumstix.com>
+Date: Fri, 30 Oct 2009 14:16:27 -0400
+Subject: [PATCH] [ARM] pxa: Gumstix Verdex PCMCIA support
+
+Needed for the Libertas CS wireless device.
+
+Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
+---
+ drivers/pcmcia/Kconfig          |    3 +-
+ drivers/pcmcia/Makefile         |    3 +
+ drivers/pcmcia/pxa2xx_gumstix.c |  194 +++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 199 insertions(+), 1 deletions(-)
+ create mode 100644 drivers/pcmcia/pxa2xx_gumstix.c
+
+--- a/drivers/pcmcia/Kconfig
++++ b/drivers/pcmcia/Kconfig
+@@ -221,7 +221,8 @@ config PCMCIA_PXA2XX
+ 	depends on ARM && ARCH_PXA && PCMCIA
+ 	depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \
+ 		    || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
+-		    || ARCH_VIPER || ARCH_PXA_ESERIES || MACH_STARGATE2)
++		    || ARCH_VIPER || ARCH_PXA_ESERIES || MACH_STARGATE2 \
++		    || ARCH_GUMSTIX)
+ 	help
+ 	  Say Y here to include support for the PXA2xx PCMCIA controller
+ 
+--- a/drivers/pcmcia/Makefile
++++ b/drivers/pcmcia/Makefile
+@@ -77,4 +77,7 @@ pxa2xx-obj-$(CONFIG_MACH_PALMLD)		+= pxa
+ pxa2xx-obj-$(CONFIG_MACH_E740)			+= pxa2xx_e740.o
+ pxa2xx-obj-$(CONFIG_MACH_STARGATE2)		+= pxa2xx_stargate2.o
+ 
++pxa2xx-obj-$(CONFIG_MACH_GUMSTIX_VERDEX)	+= pxa2xx_cs.o
++pxa2xx_cs-objs					:= pxa2xx_gumstix.o
++
+ obj-$(CONFIG_PCMCIA_PXA2XX)			+= pxa2xx_core.o $(pxa2xx-obj-y)
+--- /dev/null
++++ b/drivers/pcmcia/pxa2xx_gumstix.c
+@@ -0,0 +1,194 @@
++/*
++ * linux/drivers/pcmcia/pxa2xx_gumstix.c
++ *
++ * Gumstix PCMCIA specific routines. Based on Mainstone
++ *
++ * Copyright 2004, Craig Hughes <craig@gumstix.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/gpio.h>
++
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++
++#include <pcmcia/ss.h>
++
++#include <mach/hardware.h>
++#include <asm/mach-types.h>
++
++#ifdef CONFIG_MACH_GUMSTIX_VERDEX
++#include <mach/pxa27x.h>
++#else
++#include <mach/pxa27x.h>
++#endif
++
++#include <asm/io.h>
++#include <mach/gpio.h>
++#include <mach/gumstix.h>
++#include "soc_common.h"
++
++#define ARRAY_AND_SIZE(x)	(x), ARRAY_SIZE(x)
++
++static struct pcmcia_irqs gumstix_pcmcia_irqs0[] = {
++	{ 0, GUMSTIX_S0_nCD_IRQ,	"CF0 nCD"     },
++	{ 0, GUMSTIX_S0_nSTSCHG_IRQ,	"CF0 nSTSCHG" },
++};
++
++static struct pcmcia_irqs gumstix_pcmcia_irqs1[] = {
++	{ 1, GUMSTIX_S1_nCD_IRQ,	"CF1 nCD"     },
++	{ 1, GUMSTIX_S1_nSTSCHG_IRQ,	"CF1 nSTSCHG" },
++};
++
++
++static int net_cf_vx_mode = 0;
++
++static int gumstix_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
++{
++/* Note: The verdex_pcmcia_pin_config is moved to gumstix_verdex.c in order to use mfp_pxa2xx_config
++   for board-specific pin configuration instead of the old deprecated pxa_gpio_mode function.  Thus,
++   only the IRQ init is still needed to be done here. */
++	skt->irq = (skt->nr == 0) ? ((net_cf_vx_mode == 0) ? GUMSTIX_S0_PRDY_nBSY_IRQ : GUMSTIX_S0_PRDY_nBSY_OLD_IRQ) : GUMSTIX_S1_PRDY_nBSY_IRQ;
++
++	return (skt->nr == 0) ? soc_pcmcia_request_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0)) :
++				soc_pcmcia_request_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
++}
++
++static void gumstix_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
++{
++	if(skt->nr == 0)
++	{
++		soc_pcmcia_free_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
++	} else {
++		soc_pcmcia_free_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
++	}
++
++	if (net_cf_vx_mode) {
++	    	gpio_free(GPIO_GUMSTIX_CF_OLD_RESET);
++	} else {
++		gpio_free(GPIO_GUMSTIX_CF_RESET);
++	}
++
++}
++
++static void gumstix_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
++				    struct pcmcia_state *state)
++{
++	unsigned int cd, prdy_nbsy, nbvd1;
++	if(skt->nr == 0)
++	{
++		cd = GPIO_GUMSTIX_nCD_0;
++		if(net_cf_vx_mode)
++			prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0_OLD;
++		else
++			prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_0;
++		nbvd1 = GPIO_GUMSTIX_nBVD1_0;
++	} else {
++		cd = GPIO_GUMSTIX_nCD_1;
++		prdy_nbsy = GPIO_GUMSTIX_PRDY_nBSY_1;
++		nbvd1 = GPIO_GUMSTIX_nBVD1_1;
++	}
++	state->detect = !(GPLR(cd) & GPIO_bit(cd));
++	state->ready  = !!(GPLR(prdy_nbsy) & GPIO_bit(prdy_nbsy));
++	state->bvd1   = !!(GPLR(nbvd1) & GPIO_bit(nbvd1));
++	state->bvd2   = 1;
++	state->vs_3v  = 0;
++	state->vs_Xv  = 0;
++	state->wrprot = 0;
++}
++
++static int gumstix_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
++				       const socket_state_t *state)
++{
++	return 0;
++}
++
++static void gumstix_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
++{
++	if(skt->nr) {
++		soc_pcmcia_enable_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
++	} else {
++		soc_pcmcia_enable_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
++	}
++}
++
++static void gumstix_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
++{
++	if(skt->nr) {
++		soc_pcmcia_disable_irqs(skt, gumstix_pcmcia_irqs0, ARRAY_SIZE(gumstix_pcmcia_irqs0));
++	} else {
++		soc_pcmcia_disable_irqs(skt, gumstix_pcmcia_irqs1, ARRAY_SIZE(gumstix_pcmcia_irqs1));
++	}
++}
++
++static struct pcmcia_low_level gumstix_pcmcia_ops = {
++	.owner			= THIS_MODULE,
++	.hw_init		= gumstix_pcmcia_hw_init,
++	.hw_shutdown		= gumstix_pcmcia_hw_shutdown,
++	.socket_state		= gumstix_pcmcia_socket_state,
++	.configure_socket	= gumstix_pcmcia_configure_socket,
++	.socket_init		= gumstix_pcmcia_socket_init,
++	.socket_suspend		= gumstix_pcmcia_socket_suspend,
++	.nr			= 2,
++};
++
++static struct platform_device *gumstix_pcmcia_device;
++
++extern int __init gumstix_get_cf_cards(void);
++
++#ifdef CONFIG_MACH_GUMSTIX_VERDEX
++extern int __init gumstix_check_if_netCF_vx(void);
++#endif
++
++static int __init gumstix_pcmcia_init(void)
++{
++	int ret;
++
++#ifdef CONFIG_MACH_GUMSTIX_VERDEX
++	net_cf_vx_mode = gumstix_check_if_netCF_vx();
++#endif
++
++	gumstix_pcmcia_ops.nr = gumstix_get_cf_cards();
++
++	gumstix_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
++	if (!gumstix_pcmcia_device)
++		return -ENOMEM;
++
++	ret = platform_device_add_data(gumstix_pcmcia_device, &gumstix_pcmcia_ops,
++				       sizeof(gumstix_pcmcia_ops));
++
++	if (ret == 0) {
++		printk(KERN_INFO "Registering gumstix PCMCIA interface.\n");
++		ret = platform_device_add(gumstix_pcmcia_device);
++	}
++
++	if (ret)
++		platform_device_put(gumstix_pcmcia_device);
++
++	return ret;
++}
++
++static void __exit gumstix_pcmcia_exit(void)
++{
++	/*
++	 * This call is supposed to free our gumstix_pcmcia_device.
++	 * Unfortunately platform_device don't have a free method, and
++	 * we can't assume it's free of any reference at this point so we
++	 * can't free it either.
++	 */
++	platform_device_unregister(gumstix_pcmcia_device);
++}
++
++fs_initcall(gumstix_pcmcia_init);
++module_exit(gumstix_pcmcia_exit);
++
++MODULE_LICENSE("GPL");
diff --git a/target/linux/pxa/patches/006-define_smsc911x_for_pcmcia.patch b/target/linux/pxa/patches/006-define_smsc911x_for_pcmcia.patch
new file mode 100644
index 0000000000..fe039ae62a
--- /dev/null
+++ b/target/linux/pxa/patches/006-define_smsc911x_for_pcmcia.patch
@@ -0,0 +1,37 @@
+From ddd30dbf3cfd805b0de99fc581d0fa1cc7236ef9 Mon Sep 17 00:00:00 2001
+From: Bobby Powers <bobbypowers@gmail.com>
+Date: Fri, 13 Nov 2009 01:33:05 -0500
+Subject: [PATCH] pxa: define smsc911x structures for pcmcia too
+
+The gumstix pcmcia support (which the wireless driver uses) needs
+to know about the smsc911x platform device even if smsc811x support
+is disabled, as they share resources.
+
+Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
+---
+ arch/arm/mach-pxa/gumstix-verdex.c |    6 +++++-
+ 1 files changed, 5 insertions(+), 1 deletions(-)
+
+--- a/arch/arm/mach-pxa/gumstix-verdex.c
++++ b/arch/arm/mach-pxa/gumstix-verdex.c
+@@ -51,7 +51,9 @@
+ 
+ #include <linux/delay.h>
+ 
+-#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
++
++#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) \
++    || defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+ 
+ #include <linux/smsc911x.h>
+ 
+@@ -85,7 +87,9 @@ static struct platform_device verdex_sms
+ 		.platform_data = &verdex_smsc911x_config,
+ 	},
+ };
++#endif
+ 
++#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+ static void __init verdex_init_smsc911x(void)
+ {
+ 
diff --git a/target/linux/pxa/patches/007-fix_verdex_pro_mmc_initialization.patch b/target/linux/pxa/patches/007-fix_verdex_pro_mmc_initialization.patch
new file mode 100644
index 0000000000..0f2332896c
--- /dev/null
+++ b/target/linux/pxa/patches/007-fix_verdex_pro_mmc_initialization.patch
@@ -0,0 +1,30 @@
+From 7169c68fec79e61549b8e9c0106dde88e4d1bf9d Mon Sep 17 00:00:00 2001
+From: Bobby Powers <rpowers@harttech.com>
+Date: Thu, 29 Oct 2009 15:39:45 -0400
+Subject: [PATCH] [ARM] pxa: fix Verdex Pro mmc initialization
+
+The MicroSD port doesn't have card detect, read-only switch
+support, and is continuously powered.  Somewhere in the
+forward-porting this got lost in the structure initialization.
+
+Signed-off-by: Bobby Powers <rpowers@harttech.com>
+---
+ arch/arm/mach-pxa/gumstix-verdex.c |    7 +++++--
+ 1 files changed, 5 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/mach-pxa/gumstix-verdex.c
++++ b/arch/arm/mach-pxa/gumstix-verdex.c
+@@ -590,8 +590,11 @@ static int verdex_mci_init(struct device
+ }
+ 
+ static struct pxamci_platform_data verdex_mci_platform_data = {
+-    .ocr_mask   = MMC_VDD_32_33|MMC_VDD_33_34,
+-    .init       = verdex_mci_init,
++	.ocr_mask   = MMC_VDD_32_33|MMC_VDD_33_34,
++	.init       = verdex_mci_init,
++	.gpio_card_detect 	= -1,
++	.gpio_card_ro		= -1,
++	.gpio_power		= -1,
+ };
+ 
+ static void __init verdex_mmc_init(void)
diff --git a/target/linux/pxa/patches/008-verdex_mtd_support.patch b/target/linux/pxa/patches/008-verdex_mtd_support.patch
new file mode 100644
index 0000000000..dbb5bf855e
--- /dev/null
+++ b/target/linux/pxa/patches/008-verdex_mtd_support.patch
@@ -0,0 +1,57 @@
+--- a/arch/arm/mach-pxa/gumstix-verdex.c
++++ b/arch/arm/mach-pxa/gumstix-verdex.c
+@@ -51,6 +51,46 @@
+ 
+ #include <linux/delay.h>
+ 
++static struct resource flash_resource = {
++	.start	= 0x00000000,
++	.end	= SZ_64M - 1,
++	.flags	= IORESOURCE_MEM,
++};
++
++static struct mtd_partition gumstix_partitions[] = {
++	{
++		.name =		"u-boot",
++		.size =		0x00040000,
++		.offset =	0,
++		.mask_flags =	MTD_WRITEABLE  /* force read-only */
++	} , {
++		.name =		"rootfs",
++		.size =		0x01ec0000,
++		.offset =	0x00040000
++	} , {
++		.name =		"kernel",
++		.size =		0x00100000,
++		.offset =	0x01f00000
++	}
++};
++
++static struct flash_platform_data gumstix_flash_data = {
++	.map_name	= "cfi_probe",
++	.parts		= gumstix_partitions,
++	.nr_parts	= ARRAY_SIZE(gumstix_partitions),
++	.width		= 2,
++};
++
++static struct platform_device gumstix_flash_device = {
++	.name		= "pxa2xx-flash",
++	.id		= 0,
++	.dev = {
++		.platform_data = &gumstix_flash_data,
++	},
++	.resource = &flash_resource,
++	.num_resources = 1,
++};
++
+ 
+ #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) \
+     || defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
+@@ -540,6 +580,7 @@ static struct platform_device verdex_aud
+ };
+ 
+ static struct platform_device *devices[] __initdata = {
++    &gumstix_flash_device,
+     &verdex_audio_device,
+ };
+