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| author | Ian Pozella <Ian.Pozella@imgtec.com> | 2017-02-15 09:05:24 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2017-03-22 11:43:22 +0100 |
| commit | 52c17bff3c861dc28517303e535b880473a54498 (patch) | |
| tree | ed706b19a6a8f37598f73bba9c5eefb567719482 /target/linux/pistachio/patches-4.9/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch | |
| parent | 370d740647707f9caec915b5c1f5cb1a278b1d3b (diff) | |
| download | upstream-52c17bff3c861dc28517303e535b880473a54498.tar.gz upstream-52c17bff3c861dc28517303e535b880473a54498.tar.bz2 upstream-52c17bff3c861dc28517303e535b880473a54498.zip | |
pistachio: add 4.9 kernel support
This adds kernel support for the Pistachio SoC and the Marduk (Ci40)
board which uses it.
Much of the code for Pistachio has been upstreamed however some
patches are still required to boot from the Marduk board:
* spi bug fixes
* dma bug fixes
* pistachio internal clock tree bug fixes
* spi-nand implementation
* dts based mtd device naming scheme
* dts backports and bug fixes
Signed-off-by: Abhijit Mahajani <Abhijit.Mahajani@imgtec.com>
Signed-off-by: Francois Berder <francois.berder@imgtec.com>
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
Diffstat (limited to 'target/linux/pistachio/patches-4.9/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch')
| -rw-r--r-- | target/linux/pistachio/patches-4.9/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/target/linux/pistachio/patches-4.9/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch b/target/linux/pistachio/patches-4.9/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch new file mode 100644 index 0000000000..141e401fcb --- /dev/null +++ b/target/linux/pistachio/patches-4.9/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch @@ -0,0 +1,52 @@ +From 981c1d416af45eff207227aec106381ac23aac99 Mon Sep 17 00:00:00 2001 +From: Ian Pozella <Ian.Pozella@imgtec.com> +Date: Mon, 20 Feb 2017 10:00:52 +0000 +Subject: MIPS: DTS: img: marduk: switch mmc to 1 bit mode + +The mmc block in Pistachio allows 1 to 8 data bits to be used. +Marduk uses 4 bits allowing the upper 4 bits to be allocated +to the Mikrobus ports. However these bits are still connected +internally meaning the mmc block recieves signals on all data lines +and seems the internal HW CRC checks get corrupted by this erroneous +data. + +We cannot control what data is sent on these lines because they go +to external ports. 1 bit mode does not exhibit the issue hence the +safe default is to use this. If a user knows that in their use case +they will not use the upper bits then they can set to 4 bit mode in +order to improve performance. + +Also make sure that the upper 4 bits don't get allocated to the mmc +driver (the default is to assign all 8 pins) so they can be allocated +to other drivers. Allocating all 4 despite setting 1 bit mode as this +matches what is there in hardware. + +Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com> +--- + arch/mips/boot/dts/img/pistachio_marduk.dts | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/mips/boot/dts/img/pistachio_marduk.dts b/arch/mips/boot/dts/img/pistachio_marduk.dts +index cf9cebd..7708815 100644 +--- a/arch/mips/boot/dts/img/pistachio_marduk.dts ++++ b/arch/mips/boot/dts/img/pistachio_marduk.dts +@@ -120,7 +120,7 @@ + + &sdhost { + status = "okay"; +- bus-width = <4>; ++ bus-width = <1>; + disable-wp; + }; + +@@ -130,6 +130,7 @@ + + &pin_sdhost_data { + drive-strength = <2>; ++ pins = "mfio17", "mfio18", "mfio19", "mfio20"; + }; + + &pwm { +-- +2.7.4 + |