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authorPetr Štetiar <ynezz@true.cz>2020-04-17 14:29:33 +0200
committerPetr Štetiar <ynezz@true.cz>2020-04-17 15:18:12 +0200
commit23916bca61435ee80236f6aef70a3f0acacd4a93 (patch)
treeab3dc6705b08a3946a57b33c7f9f4aa835534292 /target/linux/oxnas/patches-5.4/002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch
parent0495324b9bd0b6a976ea731a1b4b77b26df32ee6 (diff)
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kernel: bump 5.4 to 5.4.33
Refreshed patches, removed upstreamed patches: oxnas: 001-irqchip-versatile-fpga-Handle-chained-IRQs-properly.patch oxnas: 002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch Run tested: qemu-x86-64, apalis Build tested: x86/64, imx6, sunxi/a53 Signed-off-by: Petr Štetiar <ynezz@true.cz>
Diffstat (limited to 'target/linux/oxnas/patches-5.4/002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch')
-rw-r--r--target/linux/oxnas/patches-5.4/002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch56
1 files changed, 0 insertions, 56 deletions
diff --git a/target/linux/oxnas/patches-5.4/002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch b/target/linux/oxnas/patches-5.4/002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch
deleted file mode 100644
index 7a82b5a7cc..0000000000
--- a/target/linux/oxnas/patches-5.4/002-irqchip-versatile-fpga-Apply-clear-mask-earlier.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From patchwork Sat Mar 21 13:38:42 2020
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Sungbo Eo <mans0n@gorani.run>
-X-Patchwork-Id: 11451163
-From: Sungbo Eo <mans0n@gorani.run>
-To: linux-oxnas@groups.io, Linus Walleij <linus.walleij@linaro.org>,
- Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>,
- Marc Zyngier <maz@kernel.org>, linux-arm-kernel@lists.infradead.org,
- linux-kernel@vger.kernel.org
-Subject: [PATCH] irqchip/versatile-fpga: Apply clear-mask earlier
-Date: Sat, 21 Mar 2020 22:38:42 +0900
-Message-Id: <20200321133842.2408823-1-mans0n@gorani.run>
-MIME-Version: 1.0
-Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org>
-
-Clear its own IRQs before the parent IRQ get enabled, so that the
-remaining IRQs do not accidentally interrupt the parent IRQ controller.
-
-This patch also fixes a reboot bug on OX820 SoC, where the remaining
-rps-timer IRQ raises a GIC interrupt that is left pending. After that,
-the rps-timer IRQ is cleared during driver initialization, and there's
-no IRQ left in rps-irq when local_irq_enable() is called, which evokes
-an error message "unexpected IRQ trap".
-
-Fixes: bdd272cbb97a ("irqchip: versatile FPGA: support cascaded interrupts from DT")
-Signed-off-by: Sungbo Eo <mans0n@gorani.run>
-Cc: Neil Armstrong <narmstrong@baylibre.com>
-Cc: Daniel Golle <daniel@makrotopia.org>
----
- drivers/irqchip/irq-versatile-fpga.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/irqchip/irq-versatile-fpga.c
-+++ b/drivers/irqchip/irq-versatile-fpga.c
-@@ -212,6 +212,9 @@ int __init fpga_irq_of_init(struct devic
- if (of_property_read_u32(node, "valid-mask", &valid_mask))
- valid_mask = 0;
-
-+ writel(clear_mask, base + IRQ_ENABLE_CLEAR);
-+ writel(clear_mask, base + FIQ_ENABLE_CLEAR);
-+
- /* Some chips are cascaded from a parent IRQ */
- parent_irq = irq_of_parse_and_map(node, 0);
- if (!parent_irq) {
-@@ -221,9 +224,6 @@ int __init fpga_irq_of_init(struct devic
-
- fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node);
-
-- writel(clear_mask, base + IRQ_ENABLE_CLEAR);
-- writel(clear_mask, base + FIQ_ENABLE_CLEAR);
--
- /*
- * On Versatile AB/PB, some secondary interrupts have a direct
- * pass-thru to the primary controller for IRQs 20 and 22-31 which need