diff options
| author | David Bauer <mail@david-bauer.net> | 2021-04-15 00:30:24 +0200 |
|---|---|---|
| committer | David Bauer <mail@david-bauer.net> | 2021-04-15 22:40:55 +0200 |
| commit | bbff6239e2ea273388f4ca0f8586945ff5f36271 (patch) | |
| tree | 851ed25ff716f314c66635511dfdd2d5ab772787 /target/linux/oxnas/patches-5.10/340-oxnas-pcie.patch | |
| parent | 956407292dc5fd41f2d8c7cc7e9ec77eb6444c1e (diff) | |
| download | upstream-bbff6239e2ea273388f4ca0f8586945ff5f36271.tar.gz upstream-bbff6239e2ea273388f4ca0f8586945ff5f36271.tar.bz2 upstream-bbff6239e2ea273388f4ca0f8586945ff5f36271.zip | |
ath79: fix 10 Mbit PLL data for TP-Link EAP2xx
Fix the PLL register value for 10 Mbit/s link modes on TP-Link EAP
boards using a AR8033 SGMII PHY.
Otherwise, 10 Mbit/s links do not transfer data.
Reported-by: Tom Herbers <freifunk@tomherbers.de>
Tested-by: Tom Herbers <freifunk@tomherbers.de>
Signed-off-by: David Bauer <mail@david-bauer.net>
Diffstat (limited to 'target/linux/oxnas/patches-5.10/340-oxnas-pcie.patch')
0 files changed, 0 insertions, 0 deletions