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author | Stijn Tintel <stijn@linux-ipv6.be> | 2018-06-04 20:06:00 +0300 |
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committer | Stijn Tintel <stijn@linux-ipv6.be> | 2018-06-05 22:54:00 +0300 |
commit | e52f3e9b13763cbfbd92fca8db0b4d19dc1e309e (patch) | |
tree | 804a13ddc9ccf75e3f0ae38102ddbf950806ea79 /target/linux/oxnas/patches-4.14/0001-ARM-dts-rename-oxnas-dts-files.patch | |
parent | 7590c3c58f5e9d580c86da10473d1d29a2f081c9 (diff) | |
download | upstream-e52f3e9b13763cbfbd92fca8db0b4d19dc1e309e.tar.gz upstream-e52f3e9b13763cbfbd92fca8db0b4d19dc1e309e.tar.bz2 upstream-e52f3e9b13763cbfbd92fca8db0b4d19dc1e309e.zip |
kernel: bump 4.14 to 4.14.48
Remove upstreamed patches:
generic/pending/101-clocksource-mips-gic-timer-fix-clocksource-counter-w.patch
generic/pending/103-MIPS-c-r4k-fix-data-corruption-related-to-cache-coherence.patch
generic/pending/182-net-qmi_wwan-add-BroadMobi-BM806U-2020-2033.patch
lantiq/0025-MIPS-lantiq-gphy-Remove-reboot-remove-reset-asserts.patch
Update patches that no longer apply:
generic/pending/811-pci_disable_usb_common_quirks.patch
ath79/0009-MIPS-ath79-add-lots-of-missing-registers.patch
Fixes CVE-2018-6412.
Compile-tested: octeon, x86/64.
Runtime-tested: octeon, x86/64.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Diffstat (limited to 'target/linux/oxnas/patches-4.14/0001-ARM-dts-rename-oxnas-dts-files.patch')
-rw-r--r-- | target/linux/oxnas/patches-4.14/0001-ARM-dts-rename-oxnas-dts-files.patch | 437 |
1 files changed, 424 insertions, 13 deletions
diff --git a/target/linux/oxnas/patches-4.14/0001-ARM-dts-rename-oxnas-dts-files.patch b/target/linux/oxnas/patches-4.14/0001-ARM-dts-rename-oxnas-dts-files.patch index 20289b3903..db6144c397 100644 --- a/target/linux/oxnas/patches-4.14/0001-ARM-dts-rename-oxnas-dts-files.patch +++ b/target/linux/oxnas/patches-4.14/0001-ARM-dts-rename-oxnas-dts-files.patch @@ -20,8 +20,6 @@ Signed-off-by: Arnd Bergmann <arnd@arndb.de> rename arch/arm/boot/dts/{wd-mbwe.dts => ox810se-wd-mbwe.dts} (100%) rename arch/arm/boot/dts/{cloudengines-pogoplug-series-3.dts => ox820-cloudengines-pogoplug-series-3.dts} (100%) -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index eff87a344566..1ae23ffa6ff4 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -685,8 +685,8 @@ dtb-$(CONFIG_ARCH_ACTIONS) += \ @@ -35,14 +33,427 @@ index eff87a344566..1ae23ffa6ff4 100644 dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8060-dragonboard.dtb \ qcom-apq8064-arrow-sd-600eval.dtb \ -diff --git a/arch/arm/boot/dts/wd-mbwe.dts b/arch/arm/boot/dts/ox810se-wd-mbwe.dts -similarity index 100% -rename from arch/arm/boot/dts/wd-mbwe.dts -rename to arch/arm/boot/dts/ox810se-wd-mbwe.dts -diff --git a/arch/arm/boot/dts/cloudengines-pogoplug-series-3.dts b/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts -similarity index 100% -rename from arch/arm/boot/dts/cloudengines-pogoplug-series-3.dts -rename to arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts --- -2.17.1 - +--- a/arch/arm/boot/dts/cloudengines-pogoplug-series-3.dts ++++ /dev/null +@@ -1,94 +0,0 @@ +-/* +- * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3 +- * +- * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com> +- * +- * Licensed under GPLv2 or later +- */ +- +-/dts-v1/; +-#include "ox820.dtsi" +- +-/ { +- model = "Cloud Engines PogoPlug Series 3"; +- +- compatible = "cloudengines,pogoplugv3", "oxsemi,ox820"; +- +- chosen { +- bootargs = "earlyprintk"; +- stdout-path = "serial0:115200n8"; +- }; +- +- memory { +- /* 128Mbytes DDR */ +- reg = <0x60000000 0x8000000>; +- }; +- +- aliases { +- serial0 = &uart0; +- gpio0 = &gpio0; +- gpio1 = &gpio1; +- }; +- +- leds { +- compatible = "gpio-leds"; +- +- blue { +- label = "pogoplug:blue"; +- gpios = <&gpio0 2 0>; +- default-state = "keep"; +- }; +- +- orange { +- label = "pogoplug:orange"; +- gpios = <&gpio1 16 1>; +- default-state = "keep"; +- }; +- +- green { +- label = "pogoplug:green"; +- gpios = <&gpio1 17 1>; +- default-state = "keep"; +- }; +- }; +-}; +- +-&uart0 { +- status = "okay"; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart0>; +-}; +- +-&nandc { +- status = "okay"; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_nand>; +- +- nand@0 { +- reg = <0>; +- #address-cells = <1>; +- #size-cells = <1>; +- nand-ecc-mode = "soft"; +- nand-ecc-algo = "hamming"; +- +- partition@0 { +- label = "boot"; +- reg = <0x00000000 0x00e00000>; +- read-only; +- }; +- +- partition@e00000 { +- label = "ubi"; +- reg = <0x00e00000 0x07200000>; +- }; +- }; +-}; +- +-ða { +- status = "okay"; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_etha_mdio>; +-}; +--- /dev/null ++++ b/arch/arm/boot/dts/ox810se-wd-mbwe.dts +@@ -0,0 +1,112 @@ ++/* ++ * wd-mbwe.dtsi - Device tree file for Western Digital My Book World Edition ++ * ++ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com> ++ * ++ * Licensed under GPLv2 or later ++ */ ++ ++/dts-v1/; ++#include "ox810se.dtsi" ++ ++/ { ++ model = "Western Digital My Book World Edition"; ++ ++ compatible = "wd,mbwe", "oxsemi,ox810se"; ++ ++ chosen { ++ bootargs = "console=ttyS1,115200n8 earlyprintk=serial"; ++ }; ++ ++ memory { ++ /* 128Mbytes DDR */ ++ reg = <0x48000000 0x8000000>; ++ }; ++ ++ aliases { ++ serial1 = &uart1; ++ gpio0 = &gpio0; ++ gpio1 = &gpio1; ++ }; ++ ++ gpio-keys-polled { ++ compatible = "gpio-keys-polled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ poll-interval = <100>; ++ ++ power { ++ label = "power"; ++ gpios = <&gpio0 0 1>; ++ linux,code = <0x198>; ++ }; ++ ++ recovery { ++ label = "recovery"; ++ gpios = <&gpio0 4 1>; ++ linux,code = <0xab>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ a0 { ++ label = "activity0"; ++ gpios = <&gpio0 25 0>; ++ default-state = "keep"; ++ }; ++ ++ a1 { ++ label = "activity1"; ++ gpios = <&gpio0 26 0>; ++ default-state = "keep"; ++ }; ++ ++ a2 { ++ label = "activity2"; ++ gpios = <&gpio0 5 0>; ++ default-state = "keep"; ++ }; ++ ++ a3 { ++ label = "activity3"; ++ gpios = <&gpio0 6 0>; ++ default-state = "keep"; ++ }; ++ ++ a4 { ++ label = "activity4"; ++ gpios = <&gpio0 7 0>; ++ default-state = "keep"; ++ }; ++ ++ a5 { ++ label = "activity5"; ++ gpios = <&gpio1 2 0>; ++ default-state = "keep"; ++ }; ++ }; ++ ++ i2c-gpio { ++ compatible = "i2c-gpio"; ++ gpios = <&gpio0 3 0 /* sda */ ++ &gpio0 2 0 /* scl */ ++ >; ++ i2c-gpio,delay-us = <2>; /* ~100 kHz */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtc0: rtc@48 { ++ compatible = "st,m41t00"; ++ reg = <0x68>; ++ }; ++ }; ++}; ++ ++&uart1 { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart1>; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts +@@ -0,0 +1,94 @@ ++/* ++ * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3 ++ * ++ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com> ++ * ++ * Licensed under GPLv2 or later ++ */ ++ ++/dts-v1/; ++#include "ox820.dtsi" ++ ++/ { ++ model = "Cloud Engines PogoPlug Series 3"; ++ ++ compatible = "cloudengines,pogoplugv3", "oxsemi,ox820"; ++ ++ chosen { ++ bootargs = "earlyprintk"; ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory { ++ /* 128Mbytes DDR */ ++ reg = <0x60000000 0x8000000>; ++ }; ++ ++ aliases { ++ serial0 = &uart0; ++ gpio0 = &gpio0; ++ gpio1 = &gpio1; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ blue { ++ label = "pogoplug:blue"; ++ gpios = <&gpio0 2 0>; ++ default-state = "keep"; ++ }; ++ ++ orange { ++ label = "pogoplug:orange"; ++ gpios = <&gpio1 16 1>; ++ default-state = "keep"; ++ }; ++ ++ green { ++ label = "pogoplug:green"; ++ gpios = <&gpio1 17 1>; ++ default-state = "keep"; ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart0>; ++}; ++ ++&nandc { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_nand>; ++ ++ nand@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ nand-ecc-mode = "soft"; ++ nand-ecc-algo = "hamming"; ++ ++ partition@0 { ++ label = "boot"; ++ reg = <0x00000000 0x00e00000>; ++ read-only; ++ }; ++ ++ partition@e00000 { ++ label = "ubi"; ++ reg = <0x00e00000 0x07200000>; ++ }; ++ }; ++}; ++ ++ða { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_etha_mdio>; ++}; +--- a/arch/arm/boot/dts/wd-mbwe.dts ++++ /dev/null +@@ -1,112 +0,0 @@ +-/* +- * wd-mbwe.dtsi - Device tree file for Western Digital My Book World Edition +- * +- * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com> +- * +- * Licensed under GPLv2 or later +- */ +- +-/dts-v1/; +-#include "ox810se.dtsi" +- +-/ { +- model = "Western Digital My Book World Edition"; +- +- compatible = "wd,mbwe", "oxsemi,ox810se"; +- +- chosen { +- bootargs = "console=ttyS1,115200n8 earlyprintk=serial"; +- }; +- +- memory { +- /* 128Mbytes DDR */ +- reg = <0x48000000 0x8000000>; +- }; +- +- aliases { +- serial1 = &uart1; +- gpio0 = &gpio0; +- gpio1 = &gpio1; +- }; +- +- gpio-keys-polled { +- compatible = "gpio-keys-polled"; +- #address-cells = <1>; +- #size-cells = <0>; +- poll-interval = <100>; +- +- power { +- label = "power"; +- gpios = <&gpio0 0 1>; +- linux,code = <0x198>; +- }; +- +- recovery { +- label = "recovery"; +- gpios = <&gpio0 4 1>; +- linux,code = <0xab>; +- }; +- }; +- +- leds { +- compatible = "gpio-leds"; +- +- a0 { +- label = "activity0"; +- gpios = <&gpio0 25 0>; +- default-state = "keep"; +- }; +- +- a1 { +- label = "activity1"; +- gpios = <&gpio0 26 0>; +- default-state = "keep"; +- }; +- +- a2 { +- label = "activity2"; +- gpios = <&gpio0 5 0>; +- default-state = "keep"; +- }; +- +- a3 { +- label = "activity3"; +- gpios = <&gpio0 6 0>; +- default-state = "keep"; +- }; +- +- a4 { +- label = "activity4"; +- gpios = <&gpio0 7 0>; +- default-state = "keep"; +- }; +- +- a5 { +- label = "activity5"; +- gpios = <&gpio1 2 0>; +- default-state = "keep"; +- }; +- }; +- +- i2c-gpio { +- compatible = "i2c-gpio"; +- gpios = <&gpio0 3 0 /* sda */ +- &gpio0 2 0 /* scl */ +- >; +- i2c-gpio,delay-us = <2>; /* ~100 kHz */ +- #address-cells = <1>; +- #size-cells = <0>; +- +- rtc0: rtc@48 { +- compatible = "st,m41t00"; +- reg = <0x68>; +- }; +- }; +-}; +- +-&uart1 { +- status = "okay"; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart1>; +-}; |