oxnas: bring in new oxnas target

Reboot the oxnas target based on Linux 4.14 by rebasing our support on
top of the now-existing upstream kernel support.
This commit brings oxnas support to the level of v4.17 having upstream
drivers for Ethernet, Serial and NAND flash.
Botch up OpenWrt's local drivers for EHCI, SATA and PCIe based on the
new platform code and device-tree.
Re-introduce base-files from old oxnas target which works for now but
needs further clean-up towards generic board support.

Functional issues:
 * PCIe won't come up (hence no USB3 on Shuttle KD20)
 * I2C bus of Akitio myCloud device is likely not to work (missing
   debounce support in new pinctrl driver)

Code-style issues:
 * plla/pllb needs further cleanup -- currently their users or writing
   into the syscon regmap after acquireling the clk instead of using
   defined clk_*_*() functions to setup multipliers and dividors.
 * PCIe phy needs its own little driver.
 * SATA driver is a monster and should be split into an mfd having
   a raidctrl regmap, sata controller, sata ports and sata phy.

Tested on MitraStar STG-212 aka. Medion Akoya MD86xxx and Shuttle KD20.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>

5 files changed, 590 insertions, 0 deletions

diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-akitio-mycloud.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-akitio-mycloud.dts
new file mode 100644
index 0000000000..c0bf34c3f4
--- /dev/null
+++ b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-akitio-mycloud.dts
@@ -0,0 +1,157 @@
+/dts-v1/;
+
+#include "ox820.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Akitio MyCloud";
+
+	compatible = "akitio,mycloud", "oxsemi,ox820";
+
+	chosen {
+		bootargs = "earlyprintk";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		/* 128Mbytes DDR */
+		reg = <0x60000000 0x8000000>;
+	};
+
+	aliases {
+		serial0 = &uart0;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	i2c-gpio {
+		compatible = "i2c-gpio";
+		gpios = <&gpio1 9 0 &gpio1 10 0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c>;
+		i2c-gpio,delay-us = <10>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		ds1307: rtc@68 {
+			compatible = "dallas,ds1307";
+			reg = <0x68>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_buttons>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		power {
+			label = "power";
+			gpios = <&gpio0 11 1>;
+			linux,code = <KEY_POWER>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 6 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_leds>;
+		status {
+			label = "akitio:red:status";
+			gpios = <&gpio0 29 0>;
+		};
+	};
+
+	gpio-poweroff {
+		compatible = "gpio-poweroff";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_poweroff>;
+		gpios = <&gpio1 13 2>;
+	};
+};
+
+&pinctrl {
+	pinctrl_i2c: i2c-0 {
+		i2c {
+			pins = "gpio41", "gpio42"; /* MF_B9, MF_B10 */
+			function = "gpio";
+			/* ToDo: find a way to set debounce for those pins */
+		};
+	};
+	pinctrl_buttons: buttons-0 {
+		buttons {
+			pins = "gpio11", "gpio38"; /* MF_A11, MF_B6 GPIO */
+			function = "gpio";
+		};
+	};
+	pinctrl_leds: leds-0 {
+		leds {
+			pins = "gpio29"; /* MF_A29 GPIO */
+			function = "gpio";
+		};
+	};
+	pinctrl_poweroff: poweroff-0 {
+		poweroff {
+			pins = "gpio45"; /* MF_B13 GPIO */
+			function = "gpio";
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart0>;
+};
+
+&nandc {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_nand>;
+
+	nand@0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-ecc-mode = "soft";
+		nand-ecc-algo = "hamming";
+
+		partition@0 {
+			label = "boot";
+			reg = <0x0 0x26c0000>;
+		};
+
+		partition@26c0000 {
+			label = "ubi";
+			reg = <0x26c0000 0xd940000>;
+		};
+	};
+};
+
+&etha {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_etha_mdio>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&sata {
+	status = "okay";
+	nr-ports = <2>;
+};
+
+&pcie0 {
+	status = "okay";
+};
diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-cloudengines-pogoplug-pro.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-cloudengines-pogoplug-pro.dts
new file mode 100644
index 0000000000..363fd30d20
--- /dev/null
+++ b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-cloudengines-pogoplug-pro.dts
@@ -0,0 +1,98 @@
+/*
+ * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
+ *
+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/dts-v1/;
+#include "ox820.dtsi"
+
+/ {
+	model = "Cloud Engines PogoPlug Pro";
+
+	compatible = "cloudengines,pogoplugpro", "oxsemi,ox820";
+
+	chosen {
+		bootargs = "earlyprintk";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		/* 128Mbytes DDR */
+		reg = <0x60000000 0x8000000>;
+	};
+
+	aliases {
+		serial0 = &uart0;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		blue {
+			label = "pogoplug:blue";
+			gpios = <&gpio0 2 0>;
+			default-state = "keep";
+		};
+
+		orange {
+			label = "pogoplug:orange";
+			gpios = <&gpio1 16 1>;
+			default-state = "keep";
+		};
+
+		green {
+			label = "pogoplug:green";
+			gpios = <&gpio1 17 1>;
+			default-state = "keep";
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart0>;
+};
+
+&nandc {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_nand>;
+
+	nand@0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-ecc-mode = "soft";
+		nand-ecc-algo = "hamming";
+
+		partition@0 {
+			label = "boot";
+			reg = <0x00000000 0x00e00000>;
+			read-only;
+		};
+
+		partition@e00000 {
+			label = "ubi";
+			reg = <0x00e00000 0x07200000>;
+		};
+	};
+};
+
+&etha {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_etha_mdio>;
+};
+
+&pcie0 {
+	status = "okay";
+};
diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-mitrastar-stg212.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-mitrastar-stg212.dts
new file mode 100644
index 0000000000..834ea77653
--- /dev/null
+++ b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-mitrastar-stg212.dts
@@ -0,0 +1,116 @@
+/dts-v1/;
+
+#include "ox820.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "MitraStar Technology Corp. STG-212";
+
+	compatible = "mitrastar,stg-212", "oxsemi,ox820";
+
+	chosen {
+		bootargs = "earlyprintk";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		/* 128Mbytes DDR */
+		reg = <0x60000000 0x8000000>;
+	};
+
+	aliases {
+		serial0 = &uart0;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 11 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		copy {
+			label = "copy";
+			gpios = <&gpio1 13 1>;
+			linux,code = <KEY_COPY>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		status {
+			label = "zyxel:blue:status";
+			gpios = <&gpio1 5 0>;
+		};
+		status2 {
+			label = "zyxel:red:status";
+			gpios = <&gpio1 6 1>;
+		};
+		copy {
+			label = "zyxel:orange:copy";
+			gpios = <&gpio1 8 1>;
+		};
+	};
+
+	i2c-gpio {
+		compatible = "i2c-gpio";
+		gpios = <&gpio1 9 0 &gpio1 10 0>;
+		i2c-gpio,delay-us = <10>;
+	};
+
+};
+
+&uart0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart0>;
+};
+
+&nandc {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_nand>;
+
+	nand@0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-ecc-mode = "soft";
+		nand-ecc-algo = "hamming";
+
+		partition@0 {
+			label = "boot";
+			reg = <0x00000000 0x00e00000>;
+			read-only;
+		};
+
+		partition@e00000 {
+			label = "ubi";
+			reg = <0x00e00000 0x07200000>;
+		};
+	};
+};
+
+&etha {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_etha_mdio>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&sata {
+	status = "okay";
+};
diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-shuttle-kd20.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-shuttle-kd20.dts
new file mode 100644
index 0000000000..badfa2578e
--- /dev/null
+++ b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-shuttle-kd20.dts
@@ -0,0 +1,187 @@
+/dts-v1/;
+
+#include "ox820.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Shuttle KD20";
+
+	compatible = "shuttle,kd20", "oxsemi,ox820";
+
+	chosen {
+		bootargs = "earlyprintk";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		/* 128Mbytes DDR */
+		reg = <0x60000000 0x8000000>;
+	};
+
+	aliases {
+		serial0 = &uart0;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	i2c-gpio {
+		compatible = "i2c-gpio";
+		gpios = <&gpio1 9 0 &gpio1 10 0>;
+		i2c-gpio,delay-us = <10>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		rtc0: rtc@51 {
+			compatible = "nxp,pcf8563";
+			reg = <0x51>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+
+		power {
+			label = "power";
+			gpios = <&gpio0 10 1>;
+			linux,code = <KEY_POWER>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio0 11 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		eject1 {
+			label = "eject1";
+			gpios = <&gpio0 5 1>;
+			linux,code = <KEY_EJECTCD>;
+		};
+		eject2 {
+			label = "eject2";
+			gpios = <&gpio0 6 1>;
+			linux,code = <162>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		status {
+			label = "kd20:blue:status";
+			gpios = <&gpio1 16 0>;
+		};
+		status2 {
+			label = "kd20:red:status";
+			gpios = <&gpio1 17 0>;
+		};
+		hdd1blue {
+			label = "kd20:blue:hdd1";
+			gpios = <&gpio0 27 0>;
+			linux,default-trigger = "ata1";
+		};
+		hdd1red {
+			label = "kd20:red:hdd1";
+			gpios = <&gpio1 4 0>;
+		};
+		hdd2blue {
+			label = "kd20:blue:hdd2";
+			gpios = <&gpio1 6 0>;
+			linux,default-trigger = "ata2";
+		};
+		hdd2red {
+			label = "kd20:red:hdd2";
+			gpios = <&gpio1 7 0>;
+		};
+		usb {
+			label = "kd20:blue:usb";
+			gpios = <&gpio1 8 0>;
+		};
+	};
+
+	beeper: beeper {
+		compatible = "gpio-beeper";
+		gpios = <&gpio1 11 0>;
+	};
+
+	gpio-fan {
+		compatible = "gpio-fan";
+		gpios = <&gpio0 2 1>;
+		gpio-fan,speed-map = <0    0
+				      3000 1>;
+	};
+
+	gpio-poweroff {
+		compatible = "gpio-poweroff";
+		gpios = <&gpio0 9 0>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart0>;
+};
+
+&nandc {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_nand>;
+
+	nand@0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-ecc-mode = "soft";
+		nand-ecc-algo = "hamming";
+
+		partition@0 {
+			label = "stage1";
+			reg = <0x00000000 0x00040000>;
+			read-only;
+		};
+
+		partition@40000 {
+			label = "u-boot";
+			reg = <0x00040000 0x00200000>;
+			read-only;
+		};
+
+		partition@240000 {
+			label = "initrd";
+			reg = <0x00240000 0x00600000>;
+		};
+
+		partition@840000 {
+			label = "kernel";
+			reg = <0x00840000 0x007C0000>;
+		};
+
+		partition@e00000 {
+			label = "ubi";
+			reg = <0x01000000 0x07000000>;
+		};
+	};
+};
+
+&etha {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_etha_mdio>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&sata {
+	status = "okay";
+	nr-ports = <2>;
+};
+
+&pcie0 {
+	status = "okay";
+};
diff --git a/target/linux/oxnas/files/arch/arm/include/debug/uncompress-ox820.h b/target/linux/oxnas/files/arch/arm/include/debug/uncompress-ox820.h
new file mode 100644
index 0000000000..fbc372787e
--- /dev/null
+++ b/target/linux/oxnas/files/arch/arm/include/debug/uncompress-ox820.h
@@ -0,0 +1,32 @@
+/* linux/include/asm-arm/arch-oxnas/uncompress.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#define OXNAS_UART1_BASE 0x44200000
+
+static inline void putc(int c)
+{
+	static volatile unsigned char *uart =
+		(volatile unsigned char *)OXNAS_UART1_BASE;
+
+	while (!(uart[5] & 0x20)) {	/* LSR reg THR empty bit */
+		barrier();
+	}
+	uart[0] = c;			/* THR register */
+}
+
+static inline void flush(void)
+{
+}
+
+#define arch_decomp_setup()
+
+#define arch_decomp_wdog()
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */