oxnas: reboot target

Reboot the oxnas target based on Linux 4.14 by rebasing our support on
top of the now-existing upstream kernel support.
This commit brings oxnas support to the level of v4.17 having upstream
drivers for Ethernet, Serial and NAND flash.
Botch up OpenWrt's local drivers for EHCI, SATA and PCIe based on the
new platform code and device-tree.
Re-introduce base-files from old oxnas target which works for now but
needs further clean-up towards generic board support.

Functional issues:
 * PCIe won't come up (hence no USB3 on Shuttle KD20)
 * I2C bus of Akitio myCloud device is likely not to work (missing
   debounce support in new pinctrl driver)

Code-style issues:
 * plla/pllb needs further cleanup -- currently their users are writing
   into the syscon regmap after acquireling the clk instead of using
   defined clk_*_*() functions to setup multipliers and dividors.
 * PCIe phy needs its own little driver.
 * SATA driver is a monster and should be split into an mfd having
   a raidctrl regmap, sata controller, sata ports and sata phy.

Tested on MitraStar STG-212 aka. Medion Akoya MD86xxx and Shuttle KD20.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(squash-picked commit 17511a7ea8 and commit dcc34574ef from master)

7 files changed, 266 insertions, 657 deletions

diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-akitio.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-akitio-mycloud.dts
index 54aad1d86c..c0bf34c3f4 100644
--- a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-akitio.dts
+++ b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-akitio-mycloud.dts
@@ -1,52 +1,33 @@
-/*
- * Copyright (C) 2016 Daniel Golle <daniel@makrotopia.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
 /dts-v1/;
+
 #include "ox820.dtsi"
 
 #include <dt-bindings/input/input.h>
 
 / {
-	model = "Akitio MyCloud mini";
+	model = "Akitio MyCloud";
 
-	chosen {
-		bootargs = "console=ttyS0,115200n8 earlyprintk=serial";
-	};
-
-	pcie-controller@47C00000 {
-		status = "disabled";
-	};
-
-	uart@44200000 {
-		status = "okay";
-	};
-
-	sata@45900000 {
-		status = "okay";
-		nr-ports = <2>;
-	};
-
-	nand@41000000 {
-		status = "okay";
+	compatible = "akitio,mycloud", "oxsemi,ox820";
 
+	chosen {
+		bootargs = "earlyprintk";
+		stdout-path = "serial0:115200n8";
 	};
 
-	ethernet@40400000 {
-		status = "okay";
+	memory {
+		/* 128Mbytes DDR */
+		reg = <0x60000000 0x8000000>;
 	};
 
-	ehci@40200100 {
-		status = "okay";
+	aliases {
+		serial0 = &uart0;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
 	};
 
 	i2c-gpio {
 		compatible = "i2c-gpio";
-		gpios = <&GPIOB 9 0 &GPIOB 10 0>;
+		gpios = <&gpio1 9 0 &gpio1 10 0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_i2c>;
 		i2c-gpio,delay-us = <10>;
@@ -67,12 +48,12 @@
 		poll-interval = <100>;
 		power {
 			label = "power";
-			gpios = <&GPIOA 11 1>;
+			gpios = <&gpio0 11 1>;
 			linux,code = <KEY_POWER>;
 		};
 		reset {
 			label = "reset";
-			gpios = <&GPIOB 6 1>;
+			gpios = <&gpio1 6 1>;
 			linux,code = <KEY_RESTART>;
 		};
 	};
@@ -83,7 +64,7 @@
 		pinctrl-0 = <&pinctrl_leds>;
 		status {
 			label = "akitio:red:status";
-			gpios = <&GPIOA 29 0>;
+			gpios = <&gpio0 29 0>;
 		};
 	};
 
@@ -91,42 +72,51 @@
 		compatible = "gpio-poweroff";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_poweroff>;
-		gpios = <&GPIOB 13 2>;
+		gpios = <&gpio1 13 2>;
 	};
+};
 
-	pinctrl {
+&pinctrl {
+	pinctrl_i2c: i2c-0 {
 		i2c {
-			pinctrl_i2c: i2c-0 {
-				plxtech,pins =
-					<1  9 0 4	/* MF_B9 GPIO debounce */
-					 1 10 0 4>;	/* MF_B10 GPIO debounce */
-			};
+			pins = "gpio41", "gpio42"; /* MF_B9, MF_B10 */
+			function = "gpio";
+			/* ToDo: find a way to set debounce for those pins */
 		};
+	};
+	pinctrl_buttons: buttons-0 {
 		buttons {
-			pinctrl_buttons: buttons-0 {
-				plxtech,pins =
-					<0 11 0 0	/* MF_A11 GPIO */
-					 1  6 0 0>;	/* MF_B6 GPIO */
-			};
+			pins = "gpio11", "gpio38"; /* MF_A11, MF_B6 GPIO */
+			function = "gpio";
 		};
+	};
+	pinctrl_leds: leds-0 {
 		leds {
-			pinctrl_leds: leds-0 {
-				plxtech,pins =
-					<0 29 0 0>;	/* MF_A29 GPIO */
-			};
+			pins = "gpio29"; /* MF_A29 GPIO */
+			function = "gpio";
 		};
+	};
+	pinctrl_poweroff: poweroff-0 {
 		poweroff {
-			pinctrl_poweroff: poweroff-0 {
-				plxtech,pins =
-					<1 13 0 0>;	/* MF_B13 GPIO */
-			};
+			pins = "gpio45"; /* MF_B13 GPIO */
+			function = "gpio";
 		};
 	};
 };
 
+&uart0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart0>;
+};
+
 &nandc {
 	status = "okay";
 
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_nand>;
+
 	nand@0 {
 		reg = <0>;
 		#address-cells = <1>;
@@ -136,12 +126,32 @@
 
 		partition@0 {
 			label = "boot";
-			reg = <0x00000000 0x026c0000>;
+			reg = <0x0 0x26c0000>;
 		};
 
 		partition@26c0000 {
 			label = "ubi";
-			reg = <0x026c0000 0x0d940000>;
+			reg = <0x26c0000 0xd940000>;
 		};
 	};
 };
+
+&etha {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_etha_mdio>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&sata {
+	status = "okay";
+	nr-ports = <2>;
+};
+
+&pcie0 {
+	status = "okay";
+};
diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-cloudengines-pogoplug-pro.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-cloudengines-pogoplug-pro.dts
new file mode 100644
index 0000000000..363fd30d20
--- /dev/null
+++ b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-cloudengines-pogoplug-pro.dts
@@ -0,0 +1,98 @@
+/*
+ * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
+ *
+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/dts-v1/;
+#include "ox820.dtsi"
+
+/ {
+	model = "Cloud Engines PogoPlug Pro";
+
+	compatible = "cloudengines,pogoplugpro", "oxsemi,ox820";
+
+	chosen {
+		bootargs = "earlyprintk";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		/* 128Mbytes DDR */
+		reg = <0x60000000 0x8000000>;
+	};
+
+	aliases {
+		serial0 = &uart0;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		blue {
+			label = "pogoplug:blue";
+			gpios = <&gpio0 2 0>;
+			default-state = "keep";
+		};
+
+		orange {
+			label = "pogoplug:orange";
+			gpios = <&gpio1 16 1>;
+			default-state = "keep";
+		};
+
+		green {
+			label = "pogoplug:green";
+			gpios = <&gpio1 17 1>;
+			default-state = "keep";
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart0>;
+};
+
+&nandc {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_nand>;
+
+	nand@0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		nand-ecc-mode = "soft";
+		nand-ecc-algo = "hamming";
+
+		partition@0 {
+			label = "boot";
+			reg = <0x00000000 0x00e00000>;
+			read-only;
+		};
+
+		partition@e00000 {
+			label = "ubi";
+			reg = <0x00e00000 0x07200000>;
+		};
+	};
+};
+
+&etha {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_etha_mdio>;
+};
+
+&pcie0 {
+	status = "okay";
+};
diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-stg212.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-mitrastar-stg212.dts
index ad93d4ec15..834ea77653 100644
--- a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-stg212.dts
+++ b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-mitrastar-stg212.dts
@@ -1,11 +1,3 @@
-/*
- * Copyright (C) 2013 OpenWrt.org
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
 /dts-v1/;
 
 #include "ox820.dtsi"
@@ -15,25 +7,22 @@
 / {
 	model = "MitraStar Technology Corp. STG-212";
 
-	chosen {
-		bootargs = "console=ttyS0,115200n8 earlyprintk=serial mem=128M";
-	};
+	compatible = "mitrastar,stg-212", "oxsemi,ox820";
 
-	uart@44200000 {
-		status = "okay";
+	chosen {
+		bootargs = "earlyprintk";
+		stdout-path = "serial0:115200n8";
 	};
 
-	sata@45900000 {
-		status = "okay";
+	memory {
+		/* 128Mbytes DDR */
+		reg = <0x60000000 0x8000000>;
 	};
 
-
-	ethernet@40400000 {
-		status = "okay";
-	};
-
-	ehci@40200100 {
-		status = "okay";
+	aliases {
+		serial0 = &uart0;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
 	};
 
 	gpio-keys-polled {
@@ -44,12 +33,12 @@
 
 		reset {
 			label = "reset";
-			gpios = <&GPIOB 11 1>;
+			gpios = <&gpio1 11 1>;
 			linux,code = <KEY_RESTART>;
 		};
 		copy {
 			label = "copy";
-			gpios = <&GPIOB 13 1>;
+			gpios = <&gpio1 13 1>;
 			linux,code = <KEY_COPY>;
 		};
 	};
@@ -58,29 +47,39 @@
 		compatible = "gpio-leds";
 		status {
 			label = "zyxel:blue:status";
-			gpios = <&GPIOB 5 0>;
+			gpios = <&gpio1 5 0>;
 		};
 		status2 {
 			label = "zyxel:red:status";
-			gpios = <&GPIOB 6 1>;
+			gpios = <&gpio1 6 1>;
 		};
 		copy {
 			label = "zyxel:orange:copy";
-			gpios = <&GPIOB 8 1>;
+			gpios = <&gpio1 8 1>;
 		};
 	};
 
 	i2c-gpio {
 		compatible = "i2c-gpio";
-		gpios = <&GPIOB 9 0 &GPIOB 10 0>;
+		gpios = <&gpio1 9 0 &gpio1 10 0>;
 		i2c-gpio,delay-us = <10>;
 	};
 
 };
 
+&uart0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart0>;
+};
+
 &nandc {
 	status = "okay";
 
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_nand>;
+
 	nand@0 {
 		reg = <0>;
 		#address-cells = <1>;
@@ -100,3 +99,18 @@
 		};
 	};
 };
+
+&etha {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_etha_mdio>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&sata {
+	status = "okay";
+};
diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-pogoplug-pro.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-pogoplug-pro.dts
deleted file mode 100644
index 5b087e93fa..0000000000
--- a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-pogoplug-pro.dts
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/dts-v1/;
-#include "ox820.dtsi"
-
-/ {
-	model = "Pogoplug Pro";
-
-	chosen {
-		bootargs = "console=ttyS0,115200n8 earlyprintk=serial";
-	};
-
-	pcie-controller@47C00000 {
-		status = "okay";
-	};
-
-	uart@44200000 {
-		status = "okay";
-	};
-
-	sata@45900000 {
-		status = "okay";
-	};
-
-	ethernet@40400000 {
-		status = "okay";
-	};
-
-	ehci@40200100 {
-		status = "okay";
-	};
-
-	pinctrl {
-		leds {
-			pinctrl_leds: leds-0 {
-				plxtech,pins =
-					<0 2 0 0	/* MF_A2 */
-					 1 16 0 0	/* MF_B16 */
-					 1 17 0 0>;	/* MF_B17 */
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_leds>;
-
-		blue {
-			label = "pogoplug:blue:internal";
-			gpios = <&GPIOA 2 0>;
-
-		};
-
-		orange {
-			label = "pogoplug:orange:usr";
-			gpios = <&GPIOB 16 1>;
-		};
-
-		green {
-			label = "pogoplug:green:usr";
-			gpios = <&GPIOB 17 1>;
-		};
-	};
-};
-
-&nandc {
-	status = "okay";
-
-	nand@0 {
-		reg = <0>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		nand-ecc-mode = "soft";
-		nand-ecc-algo = "hamming";
-
-		partition@0 {
-			label = "boot";
-			reg = <0x00000000 0x00e00000>;
-			/*read-only;*/
-		};
-
-		partition@e00000 {
-			label = "ubi";
-			reg = <0x00e00000 0x07200000>;
-		};
-	};
-};
diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-pogoplug-v3.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-pogoplug-v3.dts
deleted file mode 100644
index be0f6c9077..0000000000
--- a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-pogoplug-v3.dts
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * Copyright (C) 2014 Daniel Golle <daniel@makrotopia.org>
- * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/dts-v1/;
-#include "ox820.dtsi"
-
-/ {
-	model = "Pogoplug V3";
-
-	chosen {
-		bootargs = "console=ttyS0,115200n8 earlyprintk=serial";
-	};
-
-	uart@44200000 {
-		status = "okay";
-	};
-
-	sata@45900000 {
-		status = "okay";
-	};
-
-	ethernet@40400000 {
-		status = "okay";
-	};
-
-	ehci@40200100 {
-		status = "okay";
-	};
-
-	pinctrl {
-		leds {
-			pinctrl_leds: leds-0 {
-				plxtech,pins =
-					<0 2 0 0	/* MF_A2 */
-					 1 16 0 0	/* MF_B16 */
-					 1 17 0 0>;	/* MF_B17 */
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_leds>;
-
-		blue {
-			label = "pogoplug:blue:internal";
-			gpios = <&GPIOA 2 0>;
-		};
-
-		orange {
-			label = "pogoplug:orange:usr";
-			gpios = <&GPIOB 16 1>;
-		};
-
-		green {
-			label = "pogoplug:green:usr";
-			gpios = <&GPIOB 17 1>;
-		};
-	};
-
-};
-
-&nandc {
-	status = "okay";
-
-	nand@0 {
-		reg = <0>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		nand-ecc-mode = "soft";
-		nand-ecc-algo = "hamming";
-
-		partition@0 {
-			label = "boot";
-			reg = <0x00000000 0x00e00000>;
-			/*read-only;*/
-		};
-
-		partition@e00000 {
-			label = "ubi";
-			reg = <0x00e00000 0x07200000>;
-		};
-	};
-};
diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-kd20.dts b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-shuttle-kd20.dts
index a59addccac..badfa2578e 100644
--- a/target/linux/oxnas/files/arch/arm/boot/dts/ox820-kd20.dts
+++ b/target/linux/oxnas/files/arch/arm/boot/dts/ox820-shuttle-kd20.dts
@@ -1,12 +1,5 @@
-/*
- * Copyright (C) 2014 Daniel Golle <daniel@makrotopia.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
 /dts-v1/;
+
 #include "ox820.dtsi"
 
 #include <dt-bindings/input/input.h>
@@ -14,40 +7,31 @@
 / {
 	model = "Shuttle KD20";
 
-	chosen {
-		bootargs = "console=ttyS0,115200n8 earlyprintk=serial mem=256M";
-	};
-
-	pcie-controller@47C00000 {
-		status = "okay";
-	};
-
-	uart@44200000 {
-		status = "okay";
-	};
+	compatible = "shuttle,kd20", "oxsemi,ox820";
 
-	sata@45900000 {
-		status = "okay";
-		nr-ports = <2>;
+	chosen {
+		bootargs = "earlyprintk";
+		stdout-path = "serial0:115200n8";
 	};
 
-	ethernet@40400000 {
-		status = "okay";
-		snps,phy-addr = <1>;
-		phy-mode = "rgmii-id";
+	memory {
+		/* 128Mbytes DDR */
+		reg = <0x60000000 0x8000000>;
 	};
 
-	ehci@40200100 {
-		status = "okay";
+	aliases {
+		serial0 = &uart0;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
 	};
 
 	i2c-gpio {
 		compatible = "i2c-gpio";
-		gpios = <&GPIOB 9 0 &GPIOB 10 0>;
+		gpios = <&gpio1 9 0 &gpio1 10 0>;
 		i2c-gpio,delay-us = <10>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		pcf8563: rtc@51 {
+		rtc0: rtc@51 {
 			compatible = "nxp,pcf8563";
 			reg = <0x51>;
 		};
@@ -61,22 +45,22 @@
 
 		power {
 			label = "power";
-			gpios = <&GPIOA 10 1>;
+			gpios = <&gpio0 10 1>;
 			linux,code = <KEY_POWER>;
 		};
 		reset {
 			label = "reset";
-			gpios = <&GPIOA 11 1>;
+			gpios = <&gpio0 11 1>;
 			linux,code = <KEY_RESTART>;
 		};
 		eject1 {
 			label = "eject1";
-			gpios = <&GPIOA 5 1>;
+			gpios = <&gpio0 5 1>;
 			linux,code = <KEY_EJECTCD>;
 		};
 		eject2 {
 			label = "eject2";
-			gpios = <&GPIOA 6 1>;
+			gpios = <&gpio0 6 1>;
 			linux,code = <162>;
 		};
 	};
@@ -85,57 +69,67 @@
 		compatible = "gpio-leds";
 		status {
 			label = "kd20:blue:status";
-			gpios = <&GPIOB 16 0>;
+			gpios = <&gpio1 16 0>;
 		};
 		status2 {
 			label = "kd20:red:status";
-			gpios = <&GPIOB 17 0>;
+			gpios = <&gpio1 17 0>;
 		};
 		hdd1blue {
 			label = "kd20:blue:hdd1";
-			gpios = <&GPIOA 27 0>;
+			gpios = <&gpio0 27 0>;
 			linux,default-trigger = "ata1";
 		};
 		hdd1red {
 			label = "kd20:red:hdd1";
-			gpios = <&GPIOB 4 0>;
+			gpios = <&gpio1 4 0>;
 		};
 		hdd2blue {
 			label = "kd20:blue:hdd2";
-			gpios = <&GPIOB 6 0>;
+			gpios = <&gpio1 6 0>;
 			linux,default-trigger = "ata2";
 		};
 		hdd2red {
 			label = "kd20:red:hdd2";
-			gpios = <&GPIOB 7 0>;
+			gpios = <&gpio1 7 0>;
 		};
 		usb {
 			label = "kd20:blue:usb";
-			gpios = <&GPIOB 8 0>;
+			gpios = <&gpio1 8 0>;
 		};
 	};
 
 	beeper: beeper {
 		compatible = "gpio-beeper";
-		gpios = <&GPIOB 11 0>;
+		gpios = <&gpio1 11 0>;
 	};
 
 	gpio-fan {
 		compatible = "gpio-fan";
-		gpios = <&GPIOA 2 1>;
+		gpios = <&gpio0 2 1>;
 		gpio-fan,speed-map = <0    0
 				      3000 1>;
 	};
 
 	gpio-poweroff {
 		compatible = "gpio-poweroff";
-		gpios = <&GPIOA 9 0>;
+		gpios = <&gpio0 9 0>;
 	};
 };
 
+&uart0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart0>;
+};
+
 &nandc {
 	status = "okay";
 
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_nand>;
+
 	nand@0 {
 		reg = <0>;
 		#address-cells = <1>;
@@ -171,3 +165,23 @@
 		};
 	};
 };
+
+&etha {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_etha_mdio>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&sata {
+	status = "okay";
+	nr-ports = <2>;
+};
+
+&pcie0 {
+	status = "okay";
+};
diff --git a/target/linux/oxnas/files/arch/arm/boot/dts/ox820.dtsi b/target/linux/oxnas/files/arch/arm/boot/dts/ox820.dtsi
deleted file mode 100644
index c096a7d1c3..0000000000
--- a/target/linux/oxnas/files/arch/arm/boot/dts/ox820.dtsi
+++ /dev/null
@@ -1,342 +0,0 @@
-/*
- * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include "skeleton.dtsi"
-
-/ {
-	compatible = "plxtech,nas7820", "plxtech,nas782x";
-	interrupt-parent = <&gic>;
-
-	aliases {
-		serial0 = &uart0;
-		/* alias to determine bank index */
-		gpio0 = &GPIOA;
-		gpio1 = &GPIOB;
-
-		ethernet0 = &gmac;
-	};
-
-	cpus {
-		cpu@0 {
-			compatible = "arm,arm11mpcore";
-		};
-		cpu@1 {
-			compatible = "arm,arm11mpcore";
-		};
-	};
-
-	gic: gic@47001000 {
-		compatible = "arm,arm11mp-gic";
-		interrupt-controller;
-		#interrupt-cells = <3>;
-		reg = <0x47001000 0x1000>,
-		      <0x47000100 0x0100>;
-	};
-
-	rst: reset-controller@44E00034 {
-		compatible = "plxtech,nas782x-reset";
-		#reset-cells = <1>;
-		reg = <0x44E00034 0x8>; /* currently not used */
-	};
-
-	rps: rps@44400000 {
-		compatible = "plxtech,nas782x-rps";
-		interrupt-controller;
-		#interrupt-cells = <1>;
-		reg = <0x44400000 0x14>;
-		interrupts = <0 5 0x304>;
-	};
-
-	/* external oscillator */
-	osc: oscillator {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency  = <25000000>;
-	};
-
-	sysclk: sysclk {
-		compatible = "fixed-factor-clock";
-		#clock-cells = <0>;
-		clock-div = <4>;
-		clock-mult = <1>;
-		clocks = <&osc>;
-	};
-
-	plla: plla@44e001f0 {
-		compatible = "plxtech,nas782x-plla";
-		#clock-cells = <0>;
-		clocks = <&osc>;
-		reg = <0x44e001f0 0x10>;
-	};
-
-	pllb: pllb@44f001f0 {
-		compatible = "plxtech,nas782x-pllb";
-		#clock-cells = <0>;
-		clocks = <&osc>;
-		reg = <0x44f001f0 0x10>;
-		resets = <&rst 31>;
-	};
-
-	stdclk: stdclk {
-		compatible = "plxtech,nas782x-stdclk";
-		#clock-cells = <1>;
-		clocks = <&osc>;
-	};
-
-	twdclk: twdclk {
-		compatible = "fixed-factor-clock";
-		#clock-cells = <0>;
-		clock-div = <2>;
-		clock-mult = <1>;
-		clocks = <&plla>;
-	};
-
-	gmacclk: gmacclk {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency  = <125000000>;
-	};
-
-	pinctrl {
-		/* act as a simple bus, so children will be probed automatically */
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "plxtech,nas782x-pinctrl", "simple-bus";
-		ranges;
-
-		plxtech,mux-mask = <
-			 0xFFFFFFFF 0xCC0FFDF9 0xFC000E60 0x0F03F7E0 0xF00C0FE0
-			 0x0003FFFF 0x00037FFF 0x0003FFF8 0x00000F00 0x0003F7F3
-			>;
-
-		GPIOA: gpio@44000000 {
-			compatible = "plxtech,nas782x-gpio";
-			reg = <0x44000000 0x100>, <0x44E00000 0x200>;
-			interrupts = <0 21 0x304>;
-			#gpio-cells = <2>;
-			gpio-controller;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			#gpio-lines = <32>; /* real gpio pin count */
-		};
-
-		GPIOB: gpio@44100000 {
-			compatible = "plxtech,nas782x-gpio";
-			reg = <0x44100000 0x100>, <0x44F00000 0x200>;
-			interrupts = <0 22 0x304>;
-			#gpio-cells = <2>;
-			gpio-controller;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			#gpio-lines = <18>; /* real gpio pin count */
-		};
-
-		uart0 {
-			pinctrl_uart0: uart0-0 {
-				plxtech,pins =
-					<0 30 5 0	/* MF_A30 PINMUX_ALT PINMUX_UARTA_SIN */
-					 0 31 5 0>;	/* MF_A31 PINMUX_ALT PINMUX_UARTA_SOUT */
-			};
-		};
-
-		gmac0 {
-			pinctrl_gmac0: gmac0-0 {
-				plxtech,pins =
-					<0 3 1 0	/* MF_A3 PINMUX_2 PINMUX_MACA_MDC */
-					 0 4 1 0>;	/* MF_A4 PINMUX_2 PINMUX_MACA_MDIO */
-			};
-		};
-
-		nand0 {
-			pinctrl_nand0: nand0-0 {
-				plxtech,pins =
-					<0 12 1 0	/* MF_A12 PINMUX_2 PINMUX_STATIC_DATA0 */
-					 0 13 1 0	/* MF_A13 PINMUX_2 PINMUX_STATIC_DATA1 */
-					 0 14 1 0	/* MF_A14 PINMUX_2 PINMUX_STATIC_DATA2 */
-					 0 15 1 0	/* MF_A15 PINMUX_2 PINMUX_STATIC_DATA3 */
-					 0 16 1 0	/* MF_A16 PINMUX_2 PINMUX_STATIC_DATA4 */
-					 0 17 1 0	/* MF_A17 PINMUX_2 PINMUX_STATIC_DATA5 */
-					 0 18 1 0	/* MF_A18 PINMUX_2 PINMUX_STATIC_DATA6 */
-					 0 19 1 0	/* MF_A19 PINMUX_2 PINMUX_STATIC_DATA7 */
-
-					 0 20 1 0	/* MF_A20 PINMUX_2 PINMUX_STATIC_NWE */
-					 0 21 1 0	/* MF_A21 PINMUX_2 PINMUX_STATIC_NOE */
-					 0 22 1 0	/* MF_A22 PINMUX_2 PINMUX_STATIC_NCS */
-					 0 23 1 0	/* MF_A23 PINMUX_2 PINMUX_STATIC_ADDR18 */
-					 0 24 1 0>;	/* MF_A24 PINMUX_2 PINMUX_STATIC_ADDR19 */
-			};
-		};
-	};
-
-	pcie-controller@47C00000 {
-		compatible = "plxtech,nas782x-pcie";
-		device_type = "pci";
-		#address-cells = <3>;
-		#size-cells = <2>;
-
-		/*		flag & space	bus address	host address	size */
-		ranges = <	0x82000000	0 0x48000000	0x48000000	0 0x2000000
-				0xC2000000	0 0x4A000000	0x4A000000	0 0x1E00000
-				0x81000000	0 0x4BE00000	0x4BE00000	0 0x0100000
-				0x80000000	0 0x4BF00000	0x4BF00000	0 0x0100000>;
-
-		bus-range = <0x00 0x7f>;
-
-		/*	cfg			inbound translator	phy*/
-		reg =	<0x47C00000 0x1000>,	<0x47D00000 0x100>,	 <0x44A00000 0x10>;
-
-		#interrupt-cells = <1>;
-		/* wild card mask, match all bus address & interrupt specifier */
-		/* format: bus address mask, interrupt specifier mask */
-		/* each bit 1 means need match, 0 means ignored when match */
-		interrupt-map-mask = <0 0 0 0>;
-		/* format: a list of: bus address, interrupt specifier,
-		 * parent interrupt controller & specifier */
-		interrupt-map = <0 0 0 0 &gic 0 19 0x304>;
-
-		gpios = <&GPIOB 12 0>;
-		clocks = <&stdclk 8>, <&pllb>;
-		clock-names = "pcie", "busclk";
-		resets = <&rst 7>, <&rst 14>;
-		reset-names = "pcie", "phy";
-
-		plxtech,pcie-hcsl-bit = <2>;
-		plxtech,pcie-ctrl-offset = <0x120>;
-		plxtech,pcie-outbound-offset = <0x138>;
-		status = "disabled";
-	};
-
-	pcie-controller@47E00000 {
-		compatible = "plxtech,nas782x-pcie";
-		device_type = "pci";
-		#address-cells = <3>;
-		#size-cells = <2>;
-
-		/*		flag & space	bus address	host address	size */
-		ranges = <	0x82000000	0 0x4C000000	0x4C000000	0 0x2000000
-				0xC2000000	0 0x4E000000	0x4E000000	0 0x1E00000
-				0x81000000	0 0x4FE00000	0x4FE00000	0 0x0100000
-				0x80000000	0 0x4FF00000	0x4FF00000	0 0x0100000>;
-
-		bus-range = <0x80 0xff>;
-
-		/*	cfg			inbound translator	phy*/
-		reg =	<0x47E00000 0x1000>,	<0x47F00000 0x100>,	<0x44A00000 0x10>;
-
-		#interrupt-cells = <1>;
-		/* wild card mask, match all bus address & interrupt specifier */
-		/* format: bus address mask, interrupt specifier mask */
-		/* each bit 1 means need match, 0 means ignored when match */
-		interrupt-map-mask = <0 0 0 0>;
-		/* format: a list of: bus address, interrupt specifier,
-		 * parent interrupt controller & specifier */
-		interrupt-map = <0 0 0 0 &gic 0 20 0x304>;
-
-		/* gpios = <&GPIOB 12 0>; */
-		clocks = <&stdclk 11>, <&pllb>;
-		clock-names = "pcie", "busclk";
-		resets = <&rst 23>, <&rst 14>;
-		reset-names = "pcie", "phy";
-
-		plxtech,pcie-hcsl-bit = <3>;
-		plxtech,pcie-ctrl-offset = <0x124>;
-		plxtech,pcie-outbound-offset = <0x174>;
-		status = "disabled";
-	};
-
-	local-timer@47000600 {
-		compatible = "arm,arm11mp-twd-timer";
-		reg = <0x47000600 0x20>;
-		interrupts = <1 13 0x304>;	/* percpu, irq 29, cpu mask 3, level high */
-		clocks = <&twdclk>;
-	};
-
-	watchdog@47000620 {
-		compatible = "mpcore_wdt";
-		reg = <0x47000620 0x20>;
-		interrupts = <1 14 0x304>;	/* percpu, irq 30, cpu mask 3, level high */
-		clocks = <&twdclk>;
-	};
-
-	timer@44400200 {
-		compatible = "plxtech,nas782x-rps-timer";
-		reg = <0x44400200 0x40>;
-		clocks = <&sysclk>;
-	};
-
-	uart0: uart@44200000 {
-		compatible = "ns16550a";
-		reg = <0x44200000 0x100>;
-		clock-frequency = <6250000>;
-		interrupts = <0 23 0x304>;
-		reg-shift = <0>;
-		fifo-size = <16>;
-		reg-io-width = <1>;
-		current-speed = <115200>;
-		no-loopback-test;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_uart0>;
-		status = "disabled";
-	};
-
-	sata@45900000 {
-		compatible = "plxtech,nas782x-sata";
-			/*	ports		dmactl		sgdma	*/
-		reg = <0x45900000 0x20000>, <0x459A0000 0x40>, <0x459B0000 0x20>,
-			/*	core		phy		descriptors (optional)	*/
-			<0x459E0000 0x2000>, <0x44900000 0x0C>, <0x50000000 0x1000>;
-		interrupts = <0 18 0x304>;
-		clocks = <&stdclk 4>;
-		resets = <&rst 11>, <&rst 12>, <&rst 13>;
-		reset-names = "sata", "link", "phy";
-		nr-ports = <1>;
-		status = "disabled";
-	};
-
-	nandc: nand-controller@41000000 {
-		compatible = "oxsemi,ox820-nand";
-		reg = <0x41000000 0x100000>;
-		clocks = <&stdclk 9>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_nand0>;
-		resets = <&rst 15>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	gmac: ethernet@40400000 {
-		compatible = "plxtech,nas782x-gmac", "snps,dwmac";
-		reg = <0x40400000 0x2000>;
-		interrupts = <0 8 0x304>, <0 17 0x304>;
-		interrupt-names = "macirq", "eth_wake_irq";
-		mac-address = [000000000000]; /* Filled in by U-Boot */
-		phy-mode = "rgmii";
-		clocks = <&stdclk 7>, <&gmacclk>;
-		clock-names = "gmac", "stmmaceth";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_gmac0>;
-		resets = <&rst 6>;
-		status = "disabled";
-	};
-
-	ehci@40200100 {
-		compatible = "plxtech,nas782x-ehci";
-		reg = <0x40200100 0xf00>;
-		interrupts = <0 7 0x304>;
-		clocks = <&stdclk 6>, <&pllb>, <&stdclk 12>;
-		clock-names = "usb", "refsrc", "phyref";
-		resets = <&rst 4>, <&rst 5>, <&rst 26>;
-		reset-names = "host", "phya", "phyb";
-		/* Otherwise ref300 is used, which is derived from sata phy
-		 * in that case, usb depends on sata initialization */
-		/* FIXME: how to make this dependency explicit ? */
-		plxtech,ehci_use_pllb;
-		status = "disabled";
-	};
-};