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authorGabor Juhos <juhosg@openwrt.org>2012-05-18 20:22:32 +0000
committerGabor Juhos <juhosg@openwrt.org>2012-05-18 20:22:32 +0000
commit02c2f449d7fb61ba212fec12baec65197167e7bf (patch)
tree8afd63e4117c4991f1b1285f41550777f21cfa63 /target/linux/omap24xx/patches-3.3/310-n810-lcd.patch
parentc2a2d59db5ef7b8b9c35d1756585d8b3c6f35543 (diff)
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omap24xx: add support for 3.3
Compile tested only. SVN-Revision: 31810
Diffstat (limited to 'target/linux/omap24xx/patches-3.3/310-n810-lcd.patch')
-rw-r--r--target/linux/omap24xx/patches-3.3/310-n810-lcd.patch368
1 files changed, 368 insertions, 0 deletions
diff --git a/target/linux/omap24xx/patches-3.3/310-n810-lcd.patch b/target/linux/omap24xx/patches-3.3/310-n810-lcd.patch
new file mode 100644
index 0000000000..2ee79f2de5
--- /dev/null
+++ b/target/linux/omap24xx/patches-3.3/310-n810-lcd.patch
@@ -0,0 +1,368 @@
+--- a/arch/arm/mach-omap2/board-n8x0.c
++++ b/arch/arm/mach-omap2/board-n8x0.c
+@@ -24,6 +24,7 @@
+ #include <linux/spi/spi.h>
+ #include <linux/usb/musb.h>
+ #include <sound/tlv320aic3x.h>
++#include <linux/spi/tsc2005.h>
+
+ #include <asm/mach/arch.h>
+ #include <asm/mach-types.h>
+@@ -43,6 +44,66 @@ static int slot1_cover_open;
+ static int slot2_cover_open;
+ static struct device *mmc_device;
+
++#define RX51_TSC2005_RESET_GPIO 94
++#define RX51_TSC2005_IRQ_GPIO 106
++
++#ifdef CONFIG_TOUCHSCREEN_TSC2005
++static struct tsc2005_platform_data tsc2005_config;
++static void rx51_tsc2005_set_reset(bool enable)
++{
++ gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
++}
++
++static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
++ .turbo_mode = 0,
++ .single_channel = 1,
++};
++#endif
++
++static void __init tsc2005_set_config(void)
++{
++ const struct omap_lcd_config *conf;
++
++ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
++ if (conf != NULL) {
++#ifdef CONFIG_TOUCHSCREEN_TSC2005
++ if (strcmp(conf->panel_name, "lph8923") == 0) {
++ tsc2005_config.ts_x_plate_ohm = 180;
++ tsc2005_config.ts_pressure_max = 2048;
++ tsc2005_config.ts_pressure_fudge = 2;
++ tsc2005_config.ts_x_max = 4096;
++ tsc2005_config.ts_x_fudge = 4;
++ tsc2005_config.ts_y_max = 4096;
++ tsc2005_config.ts_y_fudge = 7;
++ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
++ } else if (strcmp(conf->panel_name, "ls041y3") == 0) {
++ tsc2005_config.ts_x_plate_ohm = 280;
++ tsc2005_config.ts_pressure_max = 2048;
++ tsc2005_config.ts_pressure_fudge = 2;
++ tsc2005_config.ts_x_max = 4096;
++ tsc2005_config.ts_x_fudge = 4;
++ tsc2005_config.ts_y_max = 4096;
++ tsc2005_config.ts_y_fudge = 7;
++ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
++ } else {
++ printk(KERN_ERR "Unknown panel type, set default "
++ "touchscreen configuration\n");
++ tsc2005_config.ts_x_plate_ohm = 200;
++ }
++#endif
++ }
++}
++
++static struct omap2_mcspi_device_config mipid_mcspi_config = {
++ .turbo_mode = 0,
++ .single_channel = 1,
++};
++
++extern struct mipid_platform_data n8x0_mipid_platform_data;
++
++extern void n8x0_mipid_init(void);
++extern void n8x0_blizzard_init(void);
++
+ #define TUSB6010_ASYNC_CS 1
+ #define TUSB6010_SYNC_CS 4
+ #define TUSB6010_GPIO_INT 58
+@@ -145,12 +206,29 @@ static struct omap2_mcspi_device_config
+
+ static struct spi_board_info n800_spi_board_info[] __initdata = {
+ {
++ .modalias = "lcd_mipid",
++ .bus_num = 1,
++ .chip_select = 1,
++ .max_speed_hz = 4000000,
++ .controller_data= &mipid_mcspi_config,
++ .platform_data = &n8x0_mipid_platform_data,
++ },
++ {
+ .modalias = "p54spi",
+ .bus_num = 2,
+ .chip_select = 0,
+ .max_speed_hz = 48000000,
+ .controller_data = &p54spi_mcspi_config,
+ },
++ {
++ .modalias = "tsc2005",
++ .bus_num = 1,
++ .chip_select = 0,
++ .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
++ .max_speed_hz = 6000000,
++ .controller_data = &tsc2005_mcspi_config,
++ .platform_data = &tsc2005_config,
++ },
+ };
+
+ #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+@@ -781,6 +859,7 @@ static void __init n8x0_init_machine(voi
+ n8x0_cbus_init();
+
+ /* FIXME: add n810 spi devices */
++ tsc2005_set_config();
+ spi_register_board_info(n800_spi_board_info,
+ ARRAY_SIZE(n800_spi_board_info));
+ omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
+@@ -790,6 +869,8 @@ static void __init n8x0_init_machine(voi
+ i2c_register_board_info(2, n810_i2c_board_info_2,
+ ARRAY_SIZE(n810_i2c_board_info_2));
+ board_serial_init();
++ n8x0_mipid_init();
++ n8x0_blizzard_init();
+ omap_sdrc_init(NULL, NULL);
+ gpmc_onenand_init(board_onenand_data);
+ n8x0_mmc_init();
+--- /dev/null
++++ b/arch/arm/mach-omap2/board-n8x0-lcd.c
+@@ -0,0 +1,231 @@
++/*
++ * linux/arch/arm/mach-omap2/board-n8x0.c
++ *
++ * Copyright (C) 2005-2009 Nokia Corporation
++ * Author: Juha Yrjola <juha.yrjola@nokia.com>
++ *
++ * Modified from mach-omap2/board-generic.c
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/gpio.h>
++#include <linux/omapfb.h>
++
++#include <plat/lcd_mipid.h>
++#include <plat/blizzard.h>
++
++#include "../../../drivers/cbus/tahvo.h"
++
++
++struct tahvo_pwm_device {
++ struct device *dev;
++ int tahvo_7bit_backlight;
++};
++
++static struct tahvo_pwm_device *tahvo_pwm;
++
++static unsigned int tahvo_pwm_get_backlight_level(struct tahvo_pwm_device *pd)
++{
++ unsigned int mask;
++
++ if (pd->tahvo_7bit_backlight)
++ mask = 0x7f;
++ else
++ mask = 0x0f;
++ return tahvo_read_reg(pd->dev, TAHVO_REG_LEDPWMR) & mask;
++}
++
++static unsigned int tahvo_pwm_get_max_backlight_level(struct tahvo_pwm_device *pd)
++{
++ if (pd->tahvo_7bit_backlight)
++ return 0x7f;
++ return 0x0f;
++}
++
++static void tahvo_pwm_set_backlight_level(struct tahvo_pwm_device *pd, unsigned int level)
++{
++ unsigned int max_level;
++
++ max_level = tahvo_pwm_get_max_backlight_level(pd);
++ if (level > max_level)
++ level = max_level;
++ tahvo_write_reg(pd->dev, TAHVO_REG_LEDPWMR, level);
++}
++
++static int __init n8x0_tahvo_pwm_probe(struct platform_device *pdev)
++{
++ struct tahvo_pwm_device *pd;
++ unsigned int rev, id;
++
++ pd = kzalloc(sizeof(*pd), GFP_KERNEL);
++ if (WARN_ON(!pd))
++ return -ENOMEM;
++ pd->dev = &pdev->dev;
++
++ rev = tahvo_read_reg(pd->dev, TAHVO_REG_ASICR);
++ id = (rev >> 8) & 0xff;
++ if (id == 0x03) {
++ if ((rev & 0xff) >= 0x50)
++ pd->tahvo_7bit_backlight = 1;
++ } else if (id == 0x0b)
++ pd->tahvo_7bit_backlight = 1;
++
++ dev_set_drvdata(pd->dev, pd);
++ tahvo_pwm = pd;
++
++ return 0;
++}
++
++static struct platform_driver n8x0_tahvo_pwm_driver = {
++ .driver = {
++ .name = "tahvo-pwm",
++ },
++};
++
++static int __init n8x0_tahvo_pwm_init(void)
++{
++ return platform_driver_probe(&n8x0_tahvo_pwm_driver, n8x0_tahvo_pwm_probe);
++}
++fs_initcall(n8x0_tahvo_pwm_init);
++
++static int n8x0_get_backlight_level(struct mipid_platform_data *pdata)
++{
++ return tahvo_pwm_get_backlight_level(tahvo_pwm);
++}
++
++static int n8x0_get_max_backlight_level(struct mipid_platform_data *pdata)
++{
++ return tahvo_pwm_get_max_backlight_level(tahvo_pwm);
++}
++
++static void n8x0_set_backlight_level(struct mipid_platform_data *pdata, int level)
++{
++ tahvo_pwm_set_backlight_level(tahvo_pwm, level);
++}
++
++#define N8X0_BLIZZARD_POWERDOWN_GPIO 15
++
++// MIPID LCD Panel
++
++static void mipid_shutdown(struct mipid_platform_data *pdata)
++{
++ if (pdata->nreset_gpio != -1) {
++ pr_info("shutdown LCD\n");
++ gpio_set_value(pdata->nreset_gpio, 0);
++ msleep(120);
++ }
++}
++
++struct mipid_platform_data n8x0_mipid_platform_data = {
++ .shutdown = mipid_shutdown,
++ .get_bklight_level = n8x0_get_backlight_level,
++ .set_bklight_level = n8x0_set_backlight_level,
++ .get_bklight_max = n8x0_get_max_backlight_level,
++};
++
++void __init n8x0_mipid_init(void)
++{
++ const struct omap_lcd_config *conf;
++ int err;
++
++ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
++ if (conf != NULL) {
++ n8x0_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
++ n8x0_mipid_platform_data.data_lines = conf->data_lines;
++ if (conf->nreset_gpio != -1) {
++ err = gpio_request(conf->nreset_gpio, "MIPID nreset");
++ if (err) {
++ printk(KERN_ERR "N8x0 MIPID failed to request nreset GPIO %d\n",
++ conf->nreset_gpio);
++ } else {
++ err = gpio_direction_output(conf->nreset_gpio, 1);
++ if (err) {
++ printk(KERN_ERR "N8x0 MIPID failed to set nreset GPIO %d\n",
++ conf->nreset_gpio);
++ }
++ }
++ }
++ printk(KERN_INFO "N8x0 MIPID config loaded");
++ }
++ else
++ printk(KERN_INFO "N8x0 MIPID config not provided");
++}
++
++
++// Epson Blizzard LCD Controller
++
++static struct {
++ struct clk *sys_ck;
++} blizzard;
++
++static int blizzard_get_clocks(void)
++{
++ blizzard.sys_ck = clk_get(0, "osc_ck");
++ if (IS_ERR(blizzard.sys_ck)) {
++ printk(KERN_ERR "can't get Blizzard clock\n");
++ return PTR_ERR(blizzard.sys_ck);
++ }
++ return 0;
++}
++
++static unsigned long blizzard_get_clock_rate(struct device *dev)
++{
++ return clk_get_rate(blizzard.sys_ck);
++}
++
++static void blizzard_enable_clocks(int enable)
++{
++ if (enable)
++ clk_enable(blizzard.sys_ck);
++ else
++ clk_disable(blizzard.sys_ck);
++}
++
++static void blizzard_power_up(struct device *dev)
++{
++ /* Vcore to 1.475V */
++ tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0, 0xf);
++ msleep(10);
++
++ blizzard_enable_clocks(1);
++ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
++}
++
++static void blizzard_power_down(struct device *dev)
++{
++ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 0);
++ blizzard_enable_clocks(0);
++
++ /* Vcore to 1.005V */
++ tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0xf, 0);
++}
++
++static struct blizzard_platform_data n8x0_blizzard_data = {
++ .power_up = blizzard_power_up,
++ .power_down = blizzard_power_down,
++ .get_clock_rate = blizzard_get_clock_rate,
++ .te_connected = 1,
++};
++
++void __init n8x0_blizzard_init(void)
++{
++ int r;
++
++ r = gpio_request(N8X0_BLIZZARD_POWERDOWN_GPIO, "Blizzard pd");
++ if (r < 0)
++ {
++ printk(KERN_ERR "Can't get N8x0 Blizzard powerdown GPIO %d\n", N8X0_BLIZZARD_POWERDOWN_GPIO);
++ return;
++ }
++ gpio_direction_output(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
++
++ blizzard_get_clocks();
++ omapfb_set_ctrl_platform_data(&n8x0_blizzard_data);
++
++ printk(KERN_INFO "N8x0 Blizzard initialized");
++}
+--- a/arch/arm/mach-omap2/Makefile
++++ b/arch/arm/mach-omap2/Makefile
+@@ -205,6 +205,7 @@ obj-$(CONFIG_MACH_OMAP3EVM) += board-om
+ obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
+ obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o
+ obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
++obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0-lcd.o
+ obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \
+ sdram-nokia.o
+ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \