[octeon] add 2.6.34 support

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22452 3c298f89-4303-0410-b956-a3cf2f4a3e73

4 files changed, 377 insertions, 0 deletions

diff --git a/target/linux/octeon/config-2.6.34 b/target/linux/octeon/config-2.6.34
new file mode 100644
index 0000000000..797e9e1464
--- /dev/null
+++ b/target/linux/octeon/config-2.6.34
@@ -0,0 +1,239 @@
+# CONFIG_32BIT is not set
+CONFIG_64BIT=y
+CONFIG_64BIT_PHYS_ADDR=y
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_AR7 is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SUPPORTS_MSI=y
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_ARPD is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+CONFIG_BINFMT_ELF32=y
+CONFIG_BITREVERSE=y
+CONFIG_BLOCK_COMPAT=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_CAVIUM_OCTEON_2ND_KERNEL is not set
+CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2
+CONFIG_CAVIUM_OCTEON_HW_FIX_UNALIGNED=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_EXCEPTION=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_INTERRUPT=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_MEMCPY=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB=y
+CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD=y
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+CONFIG_CAVIUM_OCTEON_SPECIFIC_OPTIONS=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_COMPAT=y
+CONFIG_COMPAT_BRK=y
+CONFIG_COMPAT_NETLINK_MESSAGES=y
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CPU_CAVIUM_OCTEON=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+# CONFIG_CPU_LOONGSON2E is not set
+# CONFIG_CPU_LOONGSON2F is not set
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS32_R2 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+CONFIG_CPU_MIPSR2=y
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R5500 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CPU_SUPPORTS_HUGEPAGES=y
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_VR41XX is not set
+CONFIG_CRAMFS=y
+# CONFIG_CRYPTO_PCRYPT is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_DEVKMEM=y
+CONFIG_DEVPORT=y
+# CONFIG_DM9000 is not set
+CONFIG_DMA_COHERENT=y
+CONFIG_DNOTIFY=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_ELF_CORE=y
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_FLATMEM_MANUAL is not set
+CONFIG_FRAME_WARN=2048
+# CONFIG_FW_LOADER is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+# CONFIG_HAMRADIO is not set
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_SYSCALL_WRAPPERS=y
+# CONFIG_HIGH_RES_TIMERS is not set
+# CONFIG_HUGETLBFS is not set
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_OCTEON=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_CPU_OCTEON=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_KALLSYMS=y
+CONFIG_KEXEC=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_LOCK_KERNEL=y
+CONFIG_LOONGSON_UART_BASE=y
+# CONFIG_MACH_ALCHEMY is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_LOONGSON is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MACH_VR41XX is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MDIO_OCTEON=y
+# CONFIG_MIKROTIK_RB532 is not set
+CONFIG_MIPS=y
+CONFIG_MIPS32_COMPAT=y
+CONFIG_MIPS32_N32=y
+CONFIG_MIPS32_O32=y
+# CONFIG_MIPS_COBALT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=7
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_MIPS_MALTA is not set
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+CONFIG_MIPS_PGD_C0_CONTEXT=y
+# CONFIG_MIPS_SIM is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_NR_CPUS=16
+CONFIG_NR_CPUS_DEFAULT_16=y
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+CONFIG_OCTEON_ETHERNET=y
+CONFIG_OCTEON_MGMT_ETHERNET=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PHYLIB=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_POWERTV is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_RELAY=y
+CONFIG_SCHED_DEBUG=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+# CONFIG_SCSI_DMA is not set
+CONFIG_SCSI_MOD=y
+CONFIG_SECCOMP=y
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_SWARM is not set
+CONFIG_SMP=y
+CONFIG_SPARSEMEM=y
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+CONFIG_STOP_MACHINE=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_SYSVIPC_COMPAT=y
+CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_HIGHMEM=y
+CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
+CONFIG_SYS_SUPPORTS_SMP=y
+# CONFIG_TC35815 is not set
+# CONFIG_TINY_RCU is not set
+CONFIG_TREE_RCU=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+# CONFIG_VLAN_8021Q is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_WEAK_ORDERING=y
+CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/octeon/patches-2.6.34/001-wndap330_hacks.patch b/target/linux/octeon/patches-2.6.34/001-wndap330_hacks.patch
new file mode 100644
index 0000000000..63f407d284
--- /dev/null
+++ b/target/linux/octeon/patches-2.6.34/001-wndap330_hacks.patch
@@ -0,0 +1,77 @@
+--- a/drivers/staging/octeon/cvmx-helper-board.c
++++ b/drivers/staging/octeon/cvmx-helper-board.c
+@@ -90,7 +90,7 @@ int cvmx_helper_board_get_mii_address(in
+ 	case CVMX_BOARD_TYPE_KODAMA:
+ 	case CVMX_BOARD_TYPE_EBH3100:
+ 	case CVMX_BOARD_TYPE_HIKARI:
+-	case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
++	//case CVMX_BOARD_TYPE_CN3010_EVB_HS5: /* hack for the WNDAP330 */
+ 	case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
+ 	case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
+ 		/*
+@@ -103,6 +103,12 @@ int cvmx_helper_board_get_mii_address(in
+ 			return 9;
+ 		else
+ 			return -1;
++	case CVMX_BOARD_TYPE_CN3010_EVB_HS5: /* hack for the WNDAP330 */
++		/* We have only one port, using GMII */
++		if (ipd_port == 0)
++			return 9;
++		else
++			return -1;
+ 	case CVMX_BOARD_TYPE_NAC38:
+ 		/* Board has 8 RGMII ports PHYs are 0-7 */
+ 		if ((ipd_port >= 0) && (ipd_port < 4))
+@@ -213,7 +219,7 @@ cvmx_helper_link_info_t __cvmx_helper_bo
+ 		result.s.speed = 1000;
+ 		return result;
+ 	case CVMX_BOARD_TYPE_EBH3100:
+-	case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
++	//case CVMX_BOARD_TYPE_CN3010_EVB_HS5: /* hack for the WNDAP330 */
+ 	case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
+ 	case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
+ 		/* Port 1 on these boards is always Gigabit */
+@@ -225,6 +231,9 @@ cvmx_helper_link_info_t __cvmx_helper_bo
+ 		}
+ 		/* Fall through to the generic code below */
+ 		break;
++	case CVMX_BOARD_TYPE_CN3010_EVB_HS5: /* hack for the WNDAP330 */
++		is_broadcom_phy = 1;
++		break;
+ 	case CVMX_BOARD_TYPE_CUST_NB5:
+ 		/* Port 1 on these boards is always Gigabit */
+ 		if (ipd_port == 1) {
+--- a/drivers/staging/octeon/cvmx-helper-rgmii.c
++++ b/drivers/staging/octeon/cvmx-helper-rgmii.c
+@@ -66,13 +66,15 @@ int __cvmx_helper_rgmii_probe(int interf
+ 			cvmx_dprintf("ERROR: RGMII initialize called in "
+ 				     "SPI interface\n");
+ 		} else if (OCTEON_IS_MODEL(OCTEON_CN31XX)
+-			   || OCTEON_IS_MODEL(OCTEON_CN30XX)
++			   //|| OCTEON_IS_MODEL(OCTEON_CN30XX)
+ 			   || OCTEON_IS_MODEL(OCTEON_CN50XX)) {
+ 			/*
+ 			 * On these chips "type" says we're in
+ 			 * GMII/MII mode. This limits us to 2 ports
+ 			 */
+ 			num_ports = 2;
++		} else if (OCTEON_IS_MODEL(OCTEON_CN30XX)) {
++			num_ports = 1;
+ 		} else {
+ 			cvmx_dprintf("ERROR: Unsupported Octeon model in %s\n",
+ 				     __func__);
+--- a/arch/mips/pci/pci-octeon.c
++++ b/arch/mips/pci/pci-octeon.c
+@@ -210,9 +210,11 @@ const char *octeon_get_pci_interrupts(vo
+ 		/* This is really the NAC38 */
+ 		return "AAAAADABAAAAAAAAAAAAAAAAAAAAAAAA";
+ 	case CVMX_BOARD_TYPE_EBH3100:
+-	case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
++	//case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
+ 	case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
+ 		return "AAABAAAAAAAAAAAAAAAAAAAAAAAAAAAA";
++	case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
++		return "AAAAAAAAAAAAAABAAAAAAAAAAAAAAABA";
+ 	case CVMX_BOARD_TYPE_BBGW_REF:
+ 		return "AABCD";
+ 	case CVMX_BOARD_TYPE_THUNDER:
diff --git a/target/linux/octeon/patches-2.6.34/002-nb5_fixup.patch b/target/linux/octeon/patches-2.6.34/002-nb5_fixup.patch
new file mode 100644
index 0000000000..1d3641a73f
--- /dev/null
+++ b/target/linux/octeon/patches-2.6.34/002-nb5_fixup.patch
@@ -0,0 +1,21 @@
+--- a/arch/mips/pci/pci-octeon.c
++++ b/arch/mips/pci/pci-octeon.c
+@@ -217,6 +217,8 @@ const char *octeon_get_pci_interrupts(vo
+ 		return "AAAAAAAAAAAAAABAAAAAAAAAAAAAAABA";
+ 	case CVMX_BOARD_TYPE_BBGW_REF:
+ 		return "AABCD";
++	case CVMX_BOARD_TYPE_CUST_NB5:
++		return "ABDABAAAAAAAAAAAAAAAAAAAAAAAAAAA";
+ 	case CVMX_BOARD_TYPE_THUNDER:
+ 	case CVMX_BOARD_TYPE_EBH3000:
+ 	default:
+--- a/drivers/staging/octeon/cvmx-helper-board.c
++++ b/drivers/staging/octeon/cvmx-helper-board.c
+@@ -707,6 +707,7 @@ cvmx_helper_board_usb_clock_types_t __cv
+ {
+ 	switch (cvmx_sysinfo_get()->board_type) {
+ 	case CVMX_BOARD_TYPE_BBGW_REF:
++	case CVMX_BOARD_TYPE_CUST_NB5:
+ 		return USB_CLOCK_TYPE_CRYSTAL_12;
+ 	}
+ 	return USB_CLOCK_TYPE_REF_48;
diff --git a/target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch b/target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch
new file mode 100644
index 0000000000..2920de260e
--- /dev/null
+++ b/target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch
@@ -0,0 +1,40 @@
+When building with a toolchain that is configured to produce 32-bits executable
+by default, we will produce __lshrti3 in sched_clock() which is never resolved
+so the kernel fails to link. Unconditionally use the inline assemble version
+as suggested by David Daney, which works around the issue.
+
+CC: David Daney <ddaney@caviumnetworks.com>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/cavium-octeon/csrc-octeon.c |    8 --------
+ 1 files changed, 0 insertions(+), 8 deletions(-)
+
+diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
+index 0bf4bbe..36400d2 100644
+--- a/arch/mips/cavium-octeon/csrc-octeon.c
++++ b/arch/mips/cavium-octeon/csrc-octeon.c
+@@ -53,7 +53,6 @@ static struct clocksource clocksource_mips = {
+ unsigned long long notrace sched_clock(void)
+ {
+ 	/* 64-bit arithmatic can overflow, so use 128-bit.  */
+-#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3))
+ 	u64 t1, t2, t3;
+ 	unsigned long long rv;
+ 	u64 mult = clocksource_mips.mult;
+@@ -73,13 +72,6 @@ unsigned long long notrace sched_clock(void)
+ 		: [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift)
+ 		: "hi", "lo");
+ 	return rv;
+-#else
+-	/* GCC > 4.3 do it the easy way.  */
+-	unsigned int __attribute__((mode(TI))) t;
+-	t = read_c0_cvmcount();
+-	t = t * clocksource_mips.mult;
+-	return (unsigned long long)(t >> clocksource_mips.shift);
+-#endif
+ }
+ 
+ void __init plat_time_init(void)
+-- 
+1.7.1
+