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authorJohn Crispin <john@openwrt.org>2013-08-04 13:54:32 +0000
committerJohn Crispin <john@openwrt.org>2013-08-04 13:54:32 +0000
commit3a2040ffee99053070cd3f0424f40f64ba6403c9 (patch)
tree1a67f8449ff8d10237125a4f2c80d61bff916dc2 /target/linux/octeon/patches-3.10/0002-MIPS-Octeon-Enable-interfaces-on-EdgeRouter-Lite.patch
parent8a4726bca828860a140bef2e81cfcc653b440247 (diff)
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octeon: add support for the octeon mips64 SoC
This is the SoC used be the ESR Lite made by ubnt.com Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 37684
Diffstat (limited to 'target/linux/octeon/patches-3.10/0002-MIPS-Octeon-Enable-interfaces-on-EdgeRouter-Lite.patch')
-rw-r--r--target/linux/octeon/patches-3.10/0002-MIPS-Octeon-Enable-interfaces-on-EdgeRouter-Lite.patch75
1 files changed, 75 insertions, 0 deletions
diff --git a/target/linux/octeon/patches-3.10/0002-MIPS-Octeon-Enable-interfaces-on-EdgeRouter-Lite.patch b/target/linux/octeon/patches-3.10/0002-MIPS-Octeon-Enable-interfaces-on-EdgeRouter-Lite.patch
new file mode 100644
index 0000000000..030d1e2db1
--- /dev/null
+++ b/target/linux/octeon/patches-3.10/0002-MIPS-Octeon-Enable-interfaces-on-EdgeRouter-Lite.patch
@@ -0,0 +1,75 @@
+From a135a9b5d9683ace787c7d86f1e642d9acfacdde Mon Sep 17 00:00:00 2001
+From: Aaro Koskinen <aaro.koskinen@iki.fi>
+Date: Sun, 23 Jun 2013 20:38:44 +0000
+Subject: [PATCH] MIPS: Octeon: Enable interfaces on EdgeRouter Lite
+
+Enable interfaces on EdgeRouter Lite. Tested with cavium_octeon_defconfig
+and busybox shell. DHCP & ping works with eth0, eth1 and eth2.
+
+The board type "UBNT_E100" is taken from the sources of the vendor kernel
+shipped with the product.
+
+Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
+Acked-by: David Daney <david.daney@cavium.com>
+Cc: linux-mips@linux-mips.org
+Patchwork: https://patchwork.linux-mips.org/patch/5546/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/cavium-octeon/executive/cvmx-helper-board.c | 13 +++++++++++++
+ arch/mips/include/asm/octeon/cvmx-bootinfo.h | 2 ++
+ 2 files changed, 15 insertions(+)
+
+diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+index 7c64977..0a1283c 100644
+--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
++++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+@@ -181,6 +181,11 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
+ return ipd_port - 16 + 4;
+ else
+ return -1;
++ case CVMX_BOARD_TYPE_UBNT_E100:
++ if (ipd_port >= 0 && ipd_port <= 2)
++ return 7 - ipd_port;
++ else
++ return -1;
+ }
+
+ /* Some unknown board. Somebody forgot to update this function... */
+@@ -706,6 +711,14 @@ int __cvmx_helper_board_hardware_enable(int interface)
+ }
+ }
+ }
++ } else if (cvmx_sysinfo_get()->board_type ==
++ CVMX_BOARD_TYPE_UBNT_E100) {
++ cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(0, interface), 0);
++ cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(0, interface), 0x10);
++ cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(1, interface), 0);
++ cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(1, interface), 0x10);
++ cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(2, interface), 0);
++ cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(2, interface), 0x10);
+ }
+ return 0;
+ }
+diff --git a/arch/mips/include/asm/octeon/cvmx-bootinfo.h b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+index 284fa8d..7b7818d 100644
+--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
++++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+@@ -227,6 +227,7 @@ enum cvmx_board_types_enum {
+ * use any numbers in this range.
+ */
+ CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
++ CVMX_BOARD_TYPE_UBNT_E100 = 20002,
+ CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
+
+ /* The remaining range is reserved for future use. */
+@@ -325,6 +326,7 @@ static inline const char *cvmx_board_type_to_string(enum
+
+ /* Customer private range */
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
++ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
+ }
+ return "Unsupported Board";
+--
+1.7.10.4
+