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authorAleksander Jan Bajkowski <olek2@wp.pl>2021-02-22 19:48:42 +0100
committerChristian Marangi <ansuelsmth@gmail.com>2022-10-21 13:47:01 +0200
commit9226f1e41948e841c1a546a6b58273e6e994539a (patch)
tree48f8ea323495f7711f13a695b10b4ed5a19c5d0d /target/linux/mvebu
parent069bda0adb5cb97c78ad9ea2561512ced487fa59 (diff)
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kernel: disable CONFIG_CPU_LITTLE_ENDIAN in generic config
Endianness depends on CPU architecture. CONFIG_CPU_(BIG/LITTLE)_ENDIAN should be enabled on target or subtarget based on SoC architecture. Fixes warning: $ make kernel_oldconfig CONFIG_TARGET=subtarget ... .config:1008:warning: override: CPU_LITTLE_ENDIAN changes choice state .... Summary: - ARC - only the CONFIG_CPU_BIG_ENDIAN symbol is defined for this architeture. If it is disabled then the processor operates in LITTLE_ENDIAN mode (default), - ARM32 - CONFIG_CPU_LITTLE_ENDIAN symbol available since kernel 5.19. This option should be enabled after OpenWRT moves to kernel 6.x. After refreshing the kernel, the symbol disappears, - ARM64 - enabled CONFIG_CPU_LITTLE_ENDIAN, - MIPS - enabled relevant symbols, - POWERPC - enabled CONFIG_CPU_BIG_ENDIAN, - UML - Symbols are not defined for this architecture, - X86 - always little endian. Symbols are not defined for this architecture. Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Diffstat (limited to 'target/linux/mvebu')
-rw-r--r--target/linux/mvebu/cortexa53/config-5.101
-rw-r--r--target/linux/mvebu/cortexa53/config-5.151
-rw-r--r--target/linux/mvebu/cortexa72/config-5.101
-rw-r--r--target/linux/mvebu/cortexa72/config-5.151
4 files changed, 4 insertions, 0 deletions
diff --git a/target/linux/mvebu/cortexa53/config-5.10 b/target/linux/mvebu/cortexa53/config-5.10
index 9c76159d51..fd58578405 100644
--- a/target/linux/mvebu/cortexa53/config-5.10
+++ b/target/linux/mvebu/cortexa53/config-5.10
@@ -34,6 +34,7 @@ CONFIG_ARM_GIC_V3_ITS_PCI=y
CONFIG_ARM_PSCI_FW=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
+CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
diff --git a/target/linux/mvebu/cortexa53/config-5.15 b/target/linux/mvebu/cortexa53/config-5.15
index 3c195291d1..27d410f68b 100644
--- a/target/linux/mvebu/cortexa53/config-5.15
+++ b/target/linux/mvebu/cortexa53/config-5.15
@@ -36,6 +36,7 @@ CONFIG_ARM_GIC_V3_ITS_PCI=y
CONFIG_ARM_PSCI_FW=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
+CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_FRAME_POINTER=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
diff --git a/target/linux/mvebu/cortexa72/config-5.10 b/target/linux/mvebu/cortexa72/config-5.10
index d0eeb4b739..584c3fc9b8 100644
--- a/target/linux/mvebu/cortexa72/config-5.10
+++ b/target/linux/mvebu/cortexa72/config-5.10
@@ -34,6 +34,7 @@ CONFIG_ARM_GIC_V3_ITS_PCI=y
CONFIG_ARM_PSCI_FW=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
+CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
diff --git a/target/linux/mvebu/cortexa72/config-5.15 b/target/linux/mvebu/cortexa72/config-5.15
index 7e07c28ba6..37379834d3 100644
--- a/target/linux/mvebu/cortexa72/config-5.15
+++ b/target/linux/mvebu/cortexa72/config-5.15
@@ -36,6 +36,7 @@ CONFIG_ARM_GIC_V3_ITS_PCI=y
CONFIG_ARM_PSCI_FW=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
+CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_FRAME_POINTER=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y