diff options
author | Petr Štetiar <ynezz@true.cz> | 2021-12-12 08:19:37 +0100 |
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committer | Petr Štetiar <ynezz@true.cz> | 2021-12-19 08:23:23 +0100 |
commit | 1d94f72439034c112bfa4b694fc736123f4890a5 (patch) | |
tree | c0c916ea430038c38dfe0eec583ec31dacd2b6af /target/linux/mvebu | |
parent | cc8c1be438a3d19fec06b72b1e7854f31b9e2f71 (diff) | |
download | upstream-1d94f72439034c112bfa4b694fc736123f4890a5.tar.gz upstream-1d94f72439034c112bfa4b694fc736123f4890a5.tar.bz2 upstream-1d94f72439034c112bfa4b694fc736123f4890a5.zip |
kernel: bump 4.14 to 4.14.258
Rebased patches:
* generic: 273-batman-adv-Convert-packet.h-to-uapi-header.patch
* ipq806x: 0065-arm-override-compiler-flags.patch
* mvebu: 513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch
Removed patches:
Fixed upstream:
* ar71xx: 821-serial-core-add-support-for-boot-console-with-arbitr.patch
* ath79: 921-serial-core-add-support-for-boot-console-with-arbitr.patch
- in 4.14.256 via 9112e7ef87149b3d8093e7446d784117f6e18d69
* mvebu: 527-PCI-aardvark-allow-to-specify-link-capability.patch
- in 4.14.257 via 62a3dc9b65a2b24800fc4267b8cf590fad135034
* mvebu: 524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch
- should be hopefully fixed by the bunch of changes in .256 and .257
Run tested on ipq40xx/glinet-b1300 and mvebu/turris-omnia.
Fixes: CVE-2021-3640
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Diffstat (limited to 'target/linux/mvebu')
8 files changed, 11 insertions, 192 deletions
diff --git a/target/linux/mvebu/patches-4.14/508-arm64-dts-armada-3720-espressobin-wire-up-spi-flash.patch b/target/linux/mvebu/patches-4.14/508-arm64-dts-armada-3720-espressobin-wire-up-spi-flash.patch index 6395a3573d..9d9bb540fc 100644 --- a/target/linux/mvebu/patches-4.14/508-arm64-dts-armada-3720-espressobin-wire-up-spi-flash.patch +++ b/target/linux/mvebu/patches-4.14/508-arm64-dts-armada-3720-espressobin-wire-up-spi-flash.patch @@ -20,7 +20,7 @@ Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -100,6 +100,33 @@ +@@ -103,6 +103,33 @@ status = "okay"; }; diff --git a/target/linux/mvebu/patches-4.14/513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch b/target/linux/mvebu/patches-4.14/513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch index 19702a61ed..119354080d 100644 --- a/target/linux/mvebu/patches-4.14/513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch +++ b/target/linux/mvebu/patches-4.14/513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch @@ -1,4 +1,4 @@ -From eefe328439642101774f0f5c4ea0dc6ba1cfb687 Mon Sep 17 00:00:00 2001 +From d2314a5265eb43e754a26050caa2b31527cc1770 Mon Sep 17 00:00:00 2001 From: Ding Tao <miyatsu@qq.com> Date: Fri, 26 Oct 2018 11:50:27 +0000 Subject: [PATCH] arm64: dts: marvell: armada37xx: Add emmc/sdio pinctrl @@ -35,6 +35,6 @@ Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> + function = "sdio"; + }; + - }; - - eth0: ethernet@30000 { + pcie_reset_pins: pcie-reset-pins { + groups = "pcie1"; + function = "gpio"; diff --git a/target/linux/mvebu/patches-4.14/514-arm64-dts-marvell-armada-37xx-Enable-emmc-on-espress.patch b/target/linux/mvebu/patches-4.14/514-arm64-dts-marvell-armada-37xx-Enable-emmc-on-espress.patch index 77d9956fff..1ea710ae1e 100644 --- a/target/linux/mvebu/patches-4.14/514-arm64-dts-marvell-armada-37xx-Enable-emmc-on-espress.patch +++ b/target/linux/mvebu/patches-4.14/514-arm64-dts-marvell-armada-37xx-Enable-emmc-on-espress.patch @@ -15,7 +15,7 @@ Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -97,9 +97,31 @@ +@@ -100,9 +100,31 @@ cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>; marvell,pad-type = "sd"; vqmmc-supply = <&vcc_sd_reg1>; diff --git a/target/linux/mvebu/patches-4.14/521-arm64-dts-armada-3720-espressobin-correct-spi-node.patch b/target/linux/mvebu/patches-4.14/521-arm64-dts-armada-3720-espressobin-correct-spi-node.patch index 5c3f214d1e..373879ee2a 100644 --- a/target/linux/mvebu/patches-4.14/521-arm64-dts-armada-3720-espressobin-correct-spi-node.patch +++ b/target/linux/mvebu/patches-4.14/521-arm64-dts-armada-3720-espressobin-correct-spi-node.patch @@ -29,7 +29,7 @@ Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -127,25 +127,9 @@ +@@ -130,25 +130,9 @@ flash@0 { reg = <0>; diff --git a/target/linux/mvebu/patches-4.14/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch b/target/linux/mvebu/patches-4.14/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch index bef9c40286..b0cf062c95 100644 --- a/target/linux/mvebu/patches-4.14/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch +++ b/target/linux/mvebu/patches-4.14/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch @@ -15,7 +15,7 @@ Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -157,7 +157,7 @@ +@@ -160,7 +160,7 @@ dsa,member = <0 0>; diff --git a/target/linux/mvebu/patches-4.14/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch b/target/linux/mvebu/patches-4.14/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch deleted file mode 100644 index ab643b776f..0000000000 --- a/target/linux/mvebu/patches-4.14/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch +++ /dev/null @@ -1,138 +0,0 @@ -From patchwork Thu Sep 28 12:58:34 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2, - 3/7] PCI: aardvark: set host and device to the same MAX payload size -X-Patchwork-Submitter: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> -X-Patchwork-Id: 819587 -Message-Id: <20170928125838.11887-4-thomas.petazzoni@free-electrons.com> -To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org -Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>, - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement - <gregory.clement@free-electrons.com>, - Nadav Haklai <nadavh@marvell.com>, Hanna Hawa <hannah@marvell.com>, - Yehuda Yitschak <yehuday@marvell.com>, - linux-arm-kernel@lists.infradead.org, Antoine Tenart - <antoine.tenart@free-electrons.com>, =?utf-8?q?Miqu=C3=A8l_Raynal?= - <miquel.raynal@free-electrons.com>, Victor Gu <xigu@marvell.com>, - Thomas Petazzoni <thomas.petazzoni@free-electrons.com> -Date: Thu, 28 Sep 2017 14:58:34 +0200 -From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> -List-Id: <linux-pci.vger.kernel.org> - -From: Victor Gu <xigu@marvell.com> - -Since the Aardvark does not implement a PCIe root bus, the Linux PCIe -subsystem will not align the MAX payload size between the host and the -device. This patch ensures that the host and device have the same MAX -payload size, fixing a number of problems with various PCIe devices. - -This is part of fixing bug -https://bugzilla.kernel.org/show_bug.cgi?id=196339, this commit was -reported as the user to be important to get a Intel 7260 mini-PCIe -WiFi card working. - -Fixes: Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver") -Signed-off-by: Victor Gu <xigu@marvell.com> -Reviewed-by: Evan Wang <xswang@marvell.com> -Reviewed-by: Nadav Haklai <nadavh@marvell.com> -[Thomas: tweak commit log.] -Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> ---- - drivers/pci/host/pci-aardvark.c | 60 ++++++++++++++++++++++++++++++++++++++++- - 1 file changed, 59 insertions(+), 1 deletion(-) - ---- a/drivers/pci/host/pci-aardvark.c -+++ b/drivers/pci/host/pci-aardvark.c -@@ -30,9 +30,11 @@ - #define PCIE_CORE_DEV_CTRL_STATS_REG 0xc8 - #define PCIE_CORE_DEV_CTRL_STATS_RELAX_ORDER_DISABLE (0 << 4) - #define PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT 5 -+#define PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ 0x2 - #define PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE (0 << 11) - #define PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT 12 - #define PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ 0x2 -+#define PCIE_CORE_MPS_UNIT_BYTE 128 - #define PCIE_CORE_LINK_CTRL_STAT_REG 0xd0 - #define PCIE_CORE_LINK_L0S_ENTRY BIT(0) - #define PCIE_CORE_LINK_TRAINING BIT(5) -@@ -300,7 +302,8 @@ static void advk_pcie_setup_hw(struct ad - - /* Set PCIe Device Control and Status 1 PF0 register */ - reg = PCIE_CORE_DEV_CTRL_STATS_RELAX_ORDER_DISABLE | -- (7 << PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT) | -+ (PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ << -+ PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT) | - PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE | - (PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ << - PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT); -@@ -968,6 +971,58 @@ out_release_res: - return err; - } - -+static int advk_pcie_find_smpss(struct pci_dev *dev, void *data) -+{ -+ u8 *smpss = data; -+ -+ if (!dev) -+ return 0; -+ -+ if (!pci_is_pcie(dev)) -+ return 0; -+ -+ if (*smpss > dev->pcie_mpss) -+ *smpss = dev->pcie_mpss; -+ -+ return 0; -+} -+ -+static int advk_pcie_bus_configure_mps(struct pci_dev *dev, void *data) -+{ -+ int mps; -+ -+ if (!dev) -+ return 0; -+ -+ if (!pci_is_pcie(dev)) -+ return 0; -+ -+ mps = PCIE_CORE_MPS_UNIT_BYTE << *(u8 *)data; -+ pcie_set_mps(dev, mps); -+ -+ return 0; -+} -+ -+static void advk_pcie_configure_mps(struct pci_bus *bus, struct advk_pcie *pcie) -+{ -+ u8 smpss = PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ; -+ u32 reg; -+ -+ /* Find the minimal supported MAX payload size */ -+ advk_pcie_find_smpss(bus->self, &smpss); -+ pci_walk_bus(bus, advk_pcie_find_smpss, &smpss); -+ -+ /* Configure RC MAX payload size */ -+ reg = advk_readl(pcie, PCIE_CORE_DEV_CTRL_STATS_REG); -+ reg &= ~PCI_EXP_DEVCTL_PAYLOAD; -+ reg |= smpss << PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT; -+ advk_writel(pcie, reg, PCIE_CORE_DEV_CTRL_STATS_REG); -+ -+ /* Configure device MAX payload size */ -+ advk_pcie_bus_configure_mps(bus->self, &smpss); -+ pci_walk_bus(bus, advk_pcie_bus_configure_mps, &smpss); -+} -+ - static int advk_pcie_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; -@@ -1042,6 +1097,9 @@ static int advk_pcie_probe(struct platfo - list_for_each_entry(child, &bus->children, node) - pcie_bus_configure_settings(child); - -+ /* Configure the MAX pay load size */ -+ advk_pcie_configure_mps(bus, pcie); -+ - pci_bus_add_devices(bus); - return 0; - } diff --git a/target/linux/mvebu/patches-4.14/527-PCI-aardvark-allow-to-specify-link-capability.patch b/target/linux/mvebu/patches-4.14/527-PCI-aardvark-allow-to-specify-link-capability.patch deleted file mode 100644 index 3360123775..0000000000 --- a/target/linux/mvebu/patches-4.14/527-PCI-aardvark-allow-to-specify-link-capability.patch +++ /dev/null @@ -1,43 +0,0 @@ -From f70b629e488cc3f2a325ac35476f4f7ae502c5d0 Mon Sep 17 00:00:00 2001 -From: Tomasz Maciej Nowak <tmn505@gmail.com> -Date: Thu, 14 Jun 2018 14:24:40 +0200 -Subject: [PATCH 1/2] PCI: aardvark: allow to specify link capability - -Use DT of_pci_get_max_link_speed() facility to allow specifying link -capability. If none or unspecified value is given it falls back to gen2, -which is default for Armada 3700 SoC. - -Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> ---- - drivers/pci/host/pci-aardvark.c | 11 +++++++++-- - 1 file changed, 9 insertions(+), 2 deletions(-) - ---- a/drivers/pci/host/pci-aardvark.c -+++ b/drivers/pci/host/pci-aardvark.c -@@ -275,6 +275,8 @@ static void advk_pcie_set_ob_win(struct - - static void advk_pcie_setup_hw(struct advk_pcie *pcie) - { -+ struct device *dev = &pcie->pdev->dev; -+ struct device_node *node = dev->of_node; - u32 reg; - int i; - -@@ -314,10 +316,15 @@ static void advk_pcie_setup_hw(struct ad - PCIE_CORE_CTRL2_TD_ENABLE; - advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); - -- /* Set GEN2 */ -+ /* Set GEN */ - reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); - reg &= ~PCIE_GEN_SEL_MSK; -- reg |= SPEED_GEN_2; -+ if (of_pci_get_max_link_speed(node) == 1) -+ reg |= SPEED_GEN_1; -+ else if (of_pci_get_max_link_speed(node) == 3) -+ reg |= SPEED_GEN_3; -+ else -+ reg |= SPEED_GEN_2; - advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); - - /* Set lane X1 */ diff --git a/target/linux/mvebu/patches-4.14/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch b/target/linux/mvebu/patches-4.14/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch index 6ce49f71f0..ce67cd94c9 100644 --- a/target/linux/mvebu/patches-4.14/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch +++ b/target/linux/mvebu/patches-4.14/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch @@ -62,9 +62,9 @@ Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -83,6 +83,8 @@ - /* J9 */ - &pcie0 { +@@ -86,6 +86,8 @@ + pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>; + reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; status = "okay"; + + max-link-speed = <1>; |