kernel: bump 4.14 to 4.14.43 for 18.06

Refreshed all patches

Dropped upstreamed patches:
522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch
523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch
525-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-legacy-irq-mode.patch
527-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch

updated patches:
524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch
030-USB-serial-option-fix-dwm-158-3g-modem-interface.patch

Added new ARM64 symbol: CONFIG_ARM64_ERRATUM_1024718

Compile-tested on: cns3xxx, imx6, mvebu (arm64), x86_64
Runtime-tested on: cns3xxx, imx6, x86_64

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>

5 files changed, 6 insertions, 330 deletions

diff --git a/target/linux/mvebu/patches-4.14/522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch b/target/linux/mvebu/patches-4.14/522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch
deleted file mode 100644
index 0dead7d61d..0000000000
--- a/target/linux/mvebu/patches-4.14/522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From patchwork Thu Sep 28 12:58:32 2017
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [v2, 1/7] PCI: aardvark: fix logic in PCI configuration read/write
- functions
-X-Patchwork-Submitter: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-X-Patchwork-Id: 819586
-Message-Id: <20170928125838.11887-2-thomas.petazzoni@free-electrons.com>
-To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org
-Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
- Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement
- <gregory.clement@free-electrons.com>, 
- Nadav Haklai <nadavh@marvell.com>, Hanna Hawa <hannah@marvell.com>,
- Yehuda Yitschak <yehuday@marvell.com>,
- linux-arm-kernel@lists.infradead.org, Antoine Tenart
- <antoine.tenart@free-electrons.com>, =?utf-8?q?Miqu=C3=A8l_Raynal?=
- <miquel.raynal@free-electrons.com>, Victor Gu <xigu@marvell.com>,
- stable@vger.kernel.org, Thomas Petazzoni
- <thomas.petazzoni@free-electrons.com>
-Date: Thu, 28 Sep 2017 14:58:32 +0200
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-List-Id: <linux-pci.vger.kernel.org>
-
-From: Victor Gu <xigu@marvell.com>
-
-The PCI configuration space read/write functions were special casing
-the situation where PCI_SLOT(devfn) != 0, and returned
-PCIBIOS_DEVICE_NOT_FOUND in this case.
-
-However, will this is what is intended for the root bus, it is not
-intended for the child busses, as it prevents discovering devices with
-PCI_SLOT(x) != 0. Therefore, we return PCIBIOS_DEVICE_NOT_FOUND only
-if we're on the root bus.
-
-Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
-Cc: <stable@vger.kernel.org>
-Signed-off-by: Victor Gu <xigu@marvell.com>
-Reviewed-by: Wilson Ding <dingwei@marvell.com>
-Reviewed-by: Nadav Haklai <nadavh@marvell.com>
-[Thomas: tweak commit log.]
-Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
----
- drivers/pci/host/pci-aardvark.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/pci/host/pci-aardvark.c
-+++ b/drivers/pci/host/pci-aardvark.c
-@@ -440,7 +440,7 @@ static int advk_pcie_rd_conf(struct pci_
- 	u32 reg;
- 	int ret;
- 
--	if (PCI_SLOT(devfn) != 0) {
-+	if ((bus->number == pcie->root_bus_nr) && (PCI_SLOT(devfn) != 0)) {
- 		*val = 0xffffffff;
- 		return PCIBIOS_DEVICE_NOT_FOUND;
- 	}
-@@ -494,7 +494,7 @@ static int advk_pcie_wr_conf(struct pci_
- 	int offset;
- 	int ret;
- 
--	if (PCI_SLOT(devfn) != 0)
-+	if ((bus->number == pcie->root_bus_nr) && (PCI_SLOT(devfn) != 0))
- 		return PCIBIOS_DEVICE_NOT_FOUND;
- 
- 	if (where % size)
diff --git a/target/linux/mvebu/patches-4.14/523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch b/target/linux/mvebu/patches-4.14/523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch
deleted file mode 100644
index 238eb56269..0000000000
--- a/target/linux/mvebu/patches-4.14/523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From patchwork Thu Sep 28 12:58:33 2017
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [v2,
- 2/7] PCI: aardvark: set PIO_ADDR_LS correctly in advk_pcie_rd_conf()
-X-Patchwork-Submitter: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-X-Patchwork-Id: 819589
-Message-Id: <20170928125838.11887-3-thomas.petazzoni@free-electrons.com>
-To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org
-Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
- Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement
- <gregory.clement@free-electrons.com>, 
- Nadav Haklai <nadavh@marvell.com>, Hanna Hawa <hannah@marvell.com>,
- Yehuda Yitschak <yehuday@marvell.com>,
- linux-arm-kernel@lists.infradead.org, Antoine Tenart
- <antoine.tenart@free-electrons.com>, =?utf-8?q?Miqu=C3=A8l_Raynal?=
- <miquel.raynal@free-electrons.com>, Victor Gu <xigu@marvell.com>,
- stable@vger.kernel.org, Thomas Petazzoni
- <thomas.petazzoni@free-electrons.com>
-Date: Thu, 28 Sep 2017 14:58:33 +0200
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-List-Id: <linux-pci.vger.kernel.org>
-
-From: Victor Gu <xigu@marvell.com>
-
-When setting the PIO_ADDR_LS register during a configuration read, we
-were properly passing the device number, function number and register
-number, but not the bus number, causing issues when reading the
-configuration of PCIe devices.
-
-Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
-Cc: <stable@vger.kernel.org>
-Signed-off-by: Victor Gu <xigu@marvell.com>
-Reviewed-by: Wilson Ding <dingwei@marvell.com>
-Reviewed-by: Nadav Haklai <nadavh@marvell.com>
-[Thomas: tweak commit log.]
-Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
----
- drivers/pci/host/pci-aardvark.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pci/host/pci-aardvark.c
-+++ b/drivers/pci/host/pci-aardvark.c
-@@ -459,7 +459,7 @@ static int advk_pcie_rd_conf(struct pci_
- 	advk_writel(pcie, reg, PIO_CTRL);
- 
- 	/* Program the address registers */
--	reg = PCIE_BDF(devfn) | PCIE_CONF_REG(where);
-+	reg = PCIE_CONF_ADDR(bus->number, devfn, where);
- 	advk_writel(pcie, reg, PIO_ADDR_LS);
- 	advk_writel(pcie, 0, PIO_ADDR_MS);
- 
diff --git a/target/linux/mvebu/patches-4.14/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch b/target/linux/mvebu/patches-4.14/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch
index f7e71aa060..1847c44803 100644
--- a/target/linux/mvebu/patches-4.14/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch
+++ b/target/linux/mvebu/patches-4.14/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch
@@ -45,13 +45,14 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 
 --- a/drivers/pci/host/pci-aardvark.c
 +++ b/drivers/pci/host/pci-aardvark.c
-@@ -30,8 +30,10 @@
+@@ -30,9 +30,11 @@
  #define PCIE_CORE_DEV_CTRL_STATS_REG				0xc8
  #define     PCIE_CORE_DEV_CTRL_STATS_RELAX_ORDER_DISABLE	(0 << 4)
  #define     PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT	5
 +#define     PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ		0x2
  #define     PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE		(0 << 11)
  #define     PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT	12
+ #define     PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ		0x2
 +#define     PCIE_CORE_MPS_UNIT_BYTE				128
  #define PCIE_CORE_LINK_CTRL_STAT_REG				0xd0
  #define     PCIE_CORE_LINK_L0S_ENTRY				BIT(0)
@@ -64,9 +65,9 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 +		(PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ <<
 +		 PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT) |
  		PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE |
- 		PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT;
- 	advk_writel(pcie, reg, PCIE_CORE_DEV_CTRL_STATS_REG);
-@@ -879,6 +882,58 @@ out_release_res:
+ 		(PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ <<
+ 		 PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT);
+@@ -886,6 +889,58 @@ out_release_res:
  	return err;
  }
  
@@ -125,7 +126,7 @@ Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  static int advk_pcie_probe(struct platform_device *pdev)
  {
  	struct device *dev = &pdev->dev;
-@@ -952,6 +1007,9 @@ static int advk_pcie_probe(struct platfo
+@@ -959,6 +1014,9 @@ static int advk_pcie_probe(struct platfo
  	list_for_each_entry(child, &bus->children, node)
  		pcie_bus_configure_settings(child);
  
diff --git a/target/linux/mvebu/patches-4.14/525-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-legacy-irq-mode.patch b/target/linux/mvebu/patches-4.14/525-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-legacy-irq-mode.patch
deleted file mode 100644
index 777a078ef9..0000000000
--- a/target/linux/mvebu/patches-4.14/525-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-legacy-irq-mode.patch
+++ /dev/null
@@ -1,143 +0,0 @@
-From patchwork Thu Sep 28 12:58:35 2017
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [v2,
- 4/7] PCI: aardvark: use isr1 instead of isr0 interrupt in legacy irq
- mode
-X-Patchwork-Submitter: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-X-Patchwork-Id: 819592
-Message-Id: <20170928125838.11887-5-thomas.petazzoni@free-electrons.com>
-To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org
-Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
- Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement
- <gregory.clement@free-electrons.com>, 
- Nadav Haklai <nadavh@marvell.com>, Hanna Hawa <hannah@marvell.com>,
- Yehuda Yitschak <yehuday@marvell.com>,
- linux-arm-kernel@lists.infradead.org, Antoine Tenart
- <antoine.tenart@free-electrons.com>, =?utf-8?q?Miqu=C3=A8l_Raynal?=
- <miquel.raynal@free-electrons.com>, Victor Gu <xigu@marvell.com>,
- Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Date: Thu, 28 Sep 2017 14:58:35 +0200
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-List-Id: <linux-pci.vger.kernel.org>
-
-From: Victor Gu <xigu@marvell.com>
-
-The Aardvark has two interrupts sets:
-
- - first set is bit[23:16] of PCIe ISR 0 register(RD0074840h)
-
- - second set is bit[11:8] of PCIe ISR 1 register(RD0074848h)
-
-Only one set should be used, while another set should be masked.
-
-The second set, ISR1, is more advanced, the Legacy INT_X status bit is
-asserted once Assert_INTX message is received, and de-asserted after
-Deassert_INTX message is received. Therefore, it matches what the
-driver is currently doing in the ->irq_mask() and ->irq_unmask()
-functions. The ISR0 requires additional work to deassert the
-interrupt, which the driver doesn't do currently.
-
-This commit resolves a number of issues with legacy interrupts.
-
-This is part of fixing bug
-https://bugzilla.kernel.org/show_bug.cgi?id=196339, this commit was
-reported as the user to be important to get a Intel 7260 mini-PCIe
-WiFi card working.
-
-Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
-Signed-off-by: Victor Gu <xigu@marvell.com>
-Reviewed-by: Evan Wang <xswang@marvell.com>
-Reviewed-by: Nadav Haklai <nadavh@marvell.com>
-[Thomas: tweak commit log.]
-Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
----
- drivers/pci/host/pci-aardvark.c | 41 ++++++++++++++++++++++++-----------------
- 1 file changed, 24 insertions(+), 17 deletions(-)
-
---- a/drivers/pci/host/pci-aardvark.c
-+++ b/drivers/pci/host/pci-aardvark.c
-@@ -105,7 +105,8 @@
- #define PCIE_ISR1_MASK_REG			(CONTROL_BASE_ADDR + 0x4C)
- #define     PCIE_ISR1_POWER_STATE_CHANGE	BIT(4)
- #define     PCIE_ISR1_FLUSH			BIT(5)
--#define     PCIE_ISR1_ALL_MASK			GENMASK(5, 4)
-+#define     PCIE_ISR1_INTX_ASSERT(val)		BIT(8 + (val))
-+#define     PCIE_ISR1_ALL_MASK			GENMASK(11, 4)
- #define PCIE_MSI_ADDR_LOW_REG			(CONTROL_BASE_ADDR + 0x50)
- #define PCIE_MSI_ADDR_HIGH_REG			(CONTROL_BASE_ADDR + 0x54)
- #define PCIE_MSI_STATUS_REG			(CONTROL_BASE_ADDR + 0x58)
-@@ -615,9 +616,9 @@ static void advk_pcie_irq_mask(struct ir
- 	irq_hw_number_t hwirq = irqd_to_hwirq(d);
- 	u32 mask;
- 
--	mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);
--	mask |= PCIE_ISR0_INTX_ASSERT(hwirq);
--	advk_writel(pcie, mask, PCIE_ISR0_MASK_REG);
-+	mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
-+	mask |= PCIE_ISR1_INTX_ASSERT(hwirq);
-+	advk_writel(pcie, mask, PCIE_ISR1_MASK_REG);
- }
- 
- static void advk_pcie_irq_unmask(struct irq_data *d)
-@@ -626,9 +627,9 @@ static void advk_pcie_irq_unmask(struct
- 	irq_hw_number_t hwirq = irqd_to_hwirq(d);
- 	u32 mask;
- 
--	mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);
--	mask &= ~PCIE_ISR0_INTX_ASSERT(hwirq);
--	advk_writel(pcie, mask, PCIE_ISR0_MASK_REG);
-+	mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
-+	mask &= ~PCIE_ISR1_INTX_ASSERT(hwirq);
-+	advk_writel(pcie, mask, PCIE_ISR1_MASK_REG);
- }
- 
- static int advk_pcie_irq_map(struct irq_domain *h,
-@@ -771,29 +772,35 @@ static void advk_pcie_handle_msi(struct
- 
- static void advk_pcie_handle_int(struct advk_pcie *pcie)
- {
--	u32 val, mask, status;
-+	u32 isr0_val, isr0_mask, isr0_status;
-+	u32 isr1_val, isr1_mask, isr1_status;
- 	int i, virq;
- 
--	val = advk_readl(pcie, PCIE_ISR0_REG);
--	mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);
--	status = val & ((~mask) & PCIE_ISR0_ALL_MASK);
--
--	if (!status) {
--		advk_writel(pcie, val, PCIE_ISR0_REG);
-+	isr0_val = advk_readl(pcie, PCIE_ISR0_REG);
-+	isr0_mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);
-+	isr0_status = isr0_val & ((~isr0_mask) & PCIE_ISR0_ALL_MASK);
-+
-+	isr1_val = advk_readl(pcie, PCIE_ISR1_REG);
-+	isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
-+	isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK);
-+
-+	if (!isr0_status && !isr1_status) {
-+		advk_writel(pcie, isr0_val, PCIE_ISR0_REG);
-+		advk_writel(pcie, isr1_val, PCIE_ISR1_REG);
- 		return;
- 	}
- 
- 	/* Process MSI interrupts */
--	if (status & PCIE_ISR0_MSI_INT_PENDING)
-+	if (isr0_status & PCIE_ISR0_MSI_INT_PENDING)
- 		advk_pcie_handle_msi(pcie);
- 
- 	/* Process legacy interrupts */
- 	for (i = 0; i < PCI_NUM_INTX; i++) {
--		if (!(status & PCIE_ISR0_INTX_ASSERT(i)))
-+		if (!(isr1_status & PCIE_ISR1_INTX_ASSERT(i)))
- 			continue;
- 
--		advk_writel(pcie, PCIE_ISR0_INTX_ASSERT(i),
--			    PCIE_ISR0_REG);
-+		advk_writel(pcie, PCIE_ISR1_INTX_ASSERT(i),
-+			    PCIE_ISR1_REG);
- 
- 		virq = irq_find_mapping(pcie->irq_domain, i);
- 		generic_handle_irq(virq);
diff --git a/target/linux/mvebu/patches-4.14/527-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch b/target/linux/mvebu/patches-4.14/527-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch
deleted file mode 100644
index eaf7b097b0..0000000000
--- a/target/linux/mvebu/patches-4.14/527-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From patchwork Thu Sep 28 12:58:37 2017
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [v2,6/7] PCI: aardvark: fix PCIe max read request size setting
-X-Patchwork-Submitter: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-X-Patchwork-Id: 819591
-Message-Id: <20170928125838.11887-7-thomas.petazzoni@free-electrons.com>
-To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org
-Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
- Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement
- <gregory.clement@free-electrons.com>, 
- Nadav Haklai <nadavh@marvell.com>, Hanna Hawa <hannah@marvell.com>,
- Yehuda Yitschak <yehuday@marvell.com>,
- linux-arm-kernel@lists.infradead.org, Antoine Tenart
- <antoine.tenart@free-electrons.com>, =?utf-8?q?Miqu=C3=A8l_Raynal?=
- <miquel.raynal@free-electrons.com>, Evan Wang <xswang@marvell.com>,
- Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Date: Thu, 28 Sep 2017 14:58:37 +0200
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-List-Id: <linux-pci.vger.kernel.org>
-
-From: Evan Wang <xswang@marvell.com>
-
-There is an obvious typo issue in the definition of the PCIe maximum
-read request size: a bit shift is directly used as a value, while it
-should be used to shift the correct value.
-
-This is part of fixing bug
-https://bugzilla.kernel.org/show_bug.cgi?id=196339, this commit was
-reported as the user to be important to get a Intel 7260 mini-PCIe
-WiFi card working.
-
-Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
-Signed-off-by: Evan Wang <xswang@marvell.com>
-Reviewed-by: Victor Gu <xigu@marvell.com>
-Reviewed-by: Nadav Haklai <nadavh@marvell.com>
-[Thomas: tweak commit log.]
-Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
----
- drivers/pci/host/pci-aardvark.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/drivers/pci/host/pci-aardvark.c
-+++ b/drivers/pci/host/pci-aardvark.c
-@@ -33,6 +33,7 @@
- #define     PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ		0x2
- #define     PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE		(0 << 11)
- #define     PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT	12
-+#define     PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ		0x2
- #define     PCIE_CORE_MPS_UNIT_BYTE				128
- #define PCIE_CORE_LINK_CTRL_STAT_REG				0xd0
- #define     PCIE_CORE_LINK_L0S_ENTRY				BIT(0)
-@@ -303,7 +304,8 @@ static void advk_pcie_setup_hw(struct ad
- 		(PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ <<
- 		 PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT) |
- 		PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE |
--		PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT;
-+		(PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ <<
-+		 PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT);
- 	advk_writel(pcie, reg, PCIE_CORE_DEV_CTRL_STATS_REG);
- 
- 	/* Program PCIe Control 2 to disable strict ordering */