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author | Hauke Mehrtens <hauke@hauke-m.de> | 2021-12-05 16:43:36 +0000 |
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committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-12-12 20:08:17 +0100 |
commit | 14940aee4566cff33fff9e068fb9559a1925cf44 (patch) | |
tree | 3b95865893c878cb915970faffe6a411299d4cee /target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch | |
parent | 06547e0a58daf768ff9776339cd31231dcd5c0ea (diff) | |
download | upstream-14940aee4566cff33fff9e068fb9559a1925cf44.tar.gz upstream-14940aee4566cff33fff9e068fb9559a1925cf44.tar.bz2 upstream-14940aee4566cff33fff9e068fb9559a1925cf44.zip |
kernel: bump 5.4 to 5.4.163
Removed upstreamed:
target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch
target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch
target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch
target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch
target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch
The following patch does not apply to upstream any more and needs some
more work to make it work fully again. I am not sure if we are still
able to set the UART to a none standard baud rate.
target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch
These patches needed manually changes:
target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch
target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch
target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch
target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch
target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch
All others updated automatically.
Compile-tested on: malta/le, armvirt/64, lantiq/xrx200
Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch')
-rw-r--r-- | target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch | 123 |
1 files changed, 0 insertions, 123 deletions
diff --git a/target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch b/target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch deleted file mode 100644 index 7db1c3efa5..0000000000 --- a/target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 5169a9851daaa2782a7bd2bb83d5b1bd224b2879 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> -Date: Thu, 30 Apr 2020 10:06:18 +0200 -Subject: [PATCH] PCI: aardvark: Issue PERST via GPIO -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add support for issuing PERST via GPIO specified in 'reset-gpios' -property (as described in PCI device tree bindings). - -Some buggy cards (e.g. Compex WLE900VX or WLE1216) are not detected -after reboot when PERST is not issued during driver initialization. - -If bootloader already enabled link training then issuing PERST has no -effect for some buggy cards (e.g. Compex WLE900VX) and these cards are -not detected. We therefore clear the LINK_TRAINING_EN register before. - -It was observed that Compex WLE900VX card needs to be in PERST reset -for at least 10ms if bootloader enabled link training. - -Tested on Turris MOX. - -Link: https://lore.kernel.org/r/20200430080625.26070-6-pali@kernel.org -Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> -Signed-off-by: Pali Rohár <pali@kernel.org> -Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> -Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> ---- - drivers/pci/controller/pci-aardvark.c | 43 ++++++++++++++++++++++++++- - 1 file changed, 42 insertions(+), 1 deletion(-) - ---- a/drivers/pci/controller/pci-aardvark.c -+++ b/drivers/pci/controller/pci-aardvark.c -@@ -9,6 +9,7 @@ - */ - - #include <linux/delay.h> -+#include <linux/gpio.h> - #include <linux/interrupt.h> - #include <linux/irq.h> - #include <linux/irqdomain.h> -@@ -17,6 +18,7 @@ - #include <linux/init.h> - #include <linux/platform_device.h> - #include <linux/of_address.h> -+#include <linux/of_gpio.h> - #include <linux/of_pci.h> - - #include "../pci.h" -@@ -209,6 +211,7 @@ struct advk_pcie { - int root_bus_nr; - int link_gen; - struct pci_bridge_emul bridge; -+ struct gpio_desc *reset_gpio; - }; - - static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg) -@@ -335,10 +338,31 @@ err: - dev_err(dev, "link never came up\n"); - } - -+static void advk_pcie_issue_perst(struct advk_pcie *pcie) -+{ -+ u32 reg; -+ -+ if (!pcie->reset_gpio) -+ return; -+ -+ /* PERST does not work for some cards when link training is enabled */ -+ reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); -+ reg &= ~LINK_TRAINING_EN; -+ advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); -+ -+ /* 10ms delay is needed for some cards */ -+ dev_info(&pcie->pdev->dev, "issuing PERST via reset GPIO for 10ms\n"); -+ gpiod_set_value_cansleep(pcie->reset_gpio, 1); -+ usleep_range(10000, 11000); -+ gpiod_set_value_cansleep(pcie->reset_gpio, 0); -+} -+ - static void advk_pcie_setup_hw(struct advk_pcie *pcie) - { - u32 reg; - -+ advk_pcie_issue_perst(pcie); -+ - /* Set to Direct mode */ - reg = advk_readl(pcie, CTRL_CONFIG_REG); - reg &= ~(CTRL_MODE_MASK << CTRL_MODE_SHIFT); -@@ -421,7 +445,8 @@ static void advk_pcie_setup_hw(struct ad - - /* - * PERST# signal could have been asserted by pinctrl subsystem before -- * probe() callback has been called, making the endpoint going into -+ * probe() callback has been called or issued explicitly by reset gpio -+ * function advk_pcie_issue_perst(), making the endpoint going into - * fundamental reset. As required by PCI Express spec a delay for at - * least 100ms after such a reset before link training is needed. - */ -@@ -1251,6 +1276,22 @@ static int advk_pcie_probe(struct platfo - return ret; - } - -+ pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node, -+ "reset-gpios", 0, -+ GPIOD_OUT_LOW, -+ "pcie1-reset"); -+ ret = PTR_ERR_OR_ZERO(pcie->reset_gpio); -+ if (ret) { -+ if (ret == -ENOENT) { -+ pcie->reset_gpio = NULL; -+ } else { -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "Failed to get reset-gpio: %i\n", -+ ret); -+ return ret; -+ } -+ } -+ - ret = of_pci_get_max_link_speed(dev->of_node); - if (ret <= 0 || ret > 3) - pcie->link_gen = 3; |