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authorHauke Mehrtens <hauke@hauke-m.de>2021-10-02 15:29:16 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2021-10-02 16:05:34 +0200
commit8cc7ac54b6cfbccf61f31c51313e6480811b5f44 (patch)
tree4a0f1d2c650d837e1fd6a0156827c4a1ac958bf8 /target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch
parent1c95d78f087c9cd78caf17181525c8853d78bf1c (diff)
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kernel: bump 5.4 to 5.4.150
Manually rebased: generic/backport-5.4/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch generic/pending-5.4/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch mvebu/patches-5.4/021-arm64-dts-marvell-armada-37xx-Move-PCIe-comphy-handl.patch Removed upstreamed: generic/backport-5.4/040-ARM-8918-2-only-build-return_address-if-needed.patch layerscape/patches-5.4/819-uart-0004-MLK-18137-fsl_lpuart-Fix-loopback-mode.patch All others updated automatically. Compile-tested on: lantiq/xrx200, armvirt/64 Runtime-tested on: lantiq/xrx200, armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch')
-rw-r--r--target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch12
1 files changed, 6 insertions, 6 deletions
diff --git a/target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch b/target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch
index e3a38740c3..85ae9cabe2 100644
--- a/target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch
+++ b/target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch
@@ -42,7 +42,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
#define PCIE_CORE_LINK_WIDTH_SHIFT 20
#define PCIE_CORE_ERR_CAPCTL_REG 0x118
#define PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX BIT(5)
-@@ -202,6 +203,7 @@ struct advk_pcie {
+@@ -206,6 +207,7 @@ struct advk_pcie {
struct mutex msi_used_lock;
u16 msi_msg;
int root_bus_nr;
@@ -50,7 +50,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
struct pci_bridge_emul bridge;
};
-@@ -226,20 +228,16 @@ static int advk_pcie_link_up(struct advk
+@@ -230,20 +232,16 @@ static int advk_pcie_link_up(struct advk
static int advk_pcie_wait_for_link(struct advk_pcie *pcie)
{
@@ -72,7 +72,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
return -ETIMEDOUT;
}
-@@ -254,6 +252,85 @@ static void advk_pcie_wait_for_retrain(s
+@@ -258,6 +256,85 @@ static void advk_pcie_wait_for_retrain(s
}
}
@@ -158,7 +158,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
static void advk_pcie_setup_hw(struct advk_pcie *pcie)
{
u32 reg;
-@@ -299,12 +376,6 @@ static void advk_pcie_setup_hw(struct ad
+@@ -303,12 +380,6 @@ static void advk_pcie_setup_hw(struct ad
PCIE_CORE_CTRL2_TD_ENABLE;
advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
@@ -171,7 +171,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
/* Set lane X1 */
reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
reg &= ~LANE_CNT_MSK;
-@@ -352,20 +423,7 @@ static void advk_pcie_setup_hw(struct ad
+@@ -356,20 +427,7 @@ static void advk_pcie_setup_hw(struct ad
*/
msleep(PCI_PM_D3COLD_WAIT);
@@ -193,7 +193,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG);
reg |= PCIE_CORE_CMD_MEM_ACCESS_EN |
-@@ -1077,6 +1135,12 @@ static int advk_pcie_probe(struct platfo
+@@ -1193,6 +1251,12 @@ static int advk_pcie_probe(struct platfo
return ret;
}