diff options
| author | John Audia <graysky@archlinux.us> | 2021-07-19 05:17:10 -0400 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-07-25 13:52:38 +0200 |
| commit | 5408e811b29643e3fd5f2cd227f17263daa45a74 (patch) | |
| tree | c41b5db75482b8a16c092183206a60c13b2e1173 /target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch | |
| parent | 2b2ac841e022054ff3390f25fa41336467530a91 (diff) | |
| download | upstream-5408e811b29643e3fd5f2cd227f17263daa45a74.tar.gz upstream-5408e811b29643e3fd5f2cd227f17263daa45a74.tar.bz2 upstream-5408e811b29643e3fd5f2cd227f17263daa45a74.zip | |
kernel: bump 5.4 to 5.4.133
Manually rebased:
pending-5.4/690-net-add-support-for-threaded-NAPI-polling.patch
All other patches automatically rebased.
Build system: x86_64
Build-tested: ipq806x/R7800
Run-tested: ipq806x/R7800
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
Diffstat (limited to 'target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch')
| -rw-r--r-- | target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch b/target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch index c9e49ac2f1..3ff0dcb166 100644 --- a/target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch +++ b/target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch @@ -29,7 +29,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c -@@ -300,11 +300,6 @@ static void advk_pcie_setup_hw(struct ad +@@ -311,11 +311,6 @@ static void advk_pcie_setup_hw(struct ad reg |= LANE_COUNT_1; advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); @@ -41,7 +41,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> /* Enable MSI */ reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); reg |= PCIE_CORE_CTRL2_MSI_ENABLE; -@@ -346,7 +341,15 @@ static void advk_pcie_setup_hw(struct ad +@@ -357,7 +352,15 @@ static void advk_pcie_setup_hw(struct ad */ msleep(PCI_PM_D3COLD_WAIT); |