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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2021-07-29 22:42:38 +0200 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-07-31 19:21:01 +0200 |
| commit | 2d5ee43dc6390d84620807c741d2cb0e272b49ce (patch) | |
| tree | 8a446db7162217f8536fd099bc4d027aa591e091 /target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch | |
| parent | a205de55941b025f6f85ac19005496c726d6e157 (diff) | |
| download | upstream-2d5ee43dc6390d84620807c741d2cb0e272b49ce.tar.gz upstream-2d5ee43dc6390d84620807c741d2cb0e272b49ce.tar.bz2 upstream-2d5ee43dc6390d84620807c741d2cb0e272b49ce.zip | |
kernel: bump 5.4 to 5.4.137
Manually rebased
generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
All others updated automatically.
Compile-tested on: ramips/mt7621, armvirt/32
Runtime-tested on: ramips/mt7621, armvirt/32
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch')
| -rw-r--r-- | target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch b/target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch index c9e49ac2f1..3ff0dcb166 100644 --- a/target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch +++ b/target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch @@ -29,7 +29,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c -@@ -300,11 +300,6 @@ static void advk_pcie_setup_hw(struct ad +@@ -311,11 +311,6 @@ static void advk_pcie_setup_hw(struct ad reg |= LANE_COUNT_1; advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); @@ -41,7 +41,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> /* Enable MSI */ reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); reg |= PCIE_CORE_CTRL2_MSI_ENABLE; -@@ -346,7 +341,15 @@ static void advk_pcie_setup_hw(struct ad +@@ -357,7 +352,15 @@ static void advk_pcie_setup_hw(struct ad */ msleep(PCI_PM_D3COLD_WAIT); |