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authorTomasz Maciej Nowak <tomek_n@o2.pl>2018-03-07 22:10:02 +0100
committerHauke Mehrtens <hauke@hauke-m.de>2018-03-10 01:15:22 +0100
commit584d7c53bd2d286a71fe5e8244624f59c529cb26 (patch)
treef03f34a0d88192cd2487791d6bc28e70f0ee50fe /target/linux/mvebu/patches-4.14/522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch
parentbe3da900cdac3640398ed60f62bb445269aa8b50 (diff)
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mvebu: new subtarget cortex A53
This commit introduces new subtarget for Marvell EBU Armada Cortex A53 processor based devices. The first device is Globalscale ESPRESSObin. Some hardware specs: SoC: Marvell Armada 3700LP (88F3720) dual core ARM Cortex A53 processor up to 1.2GHz RAM: 512MB, 1GB or 2GB DDR3 Storage: SATA interface µSD card slot with footprint for an optional 4GB EMMC 4MB SPI NOR flash for bootloader Ethernet: Topaz Networking Switch (88E6341) with 3x GbE ports Connectors: USB 3.0 USB 2.0 µUSB port connected to PL2303SA (USB to serial bridge controller) for UART access Expansion: 2x 46-pin GPIO headers for accessories and shields with I2C, GPIOs, PWM, UART, SPI, MMC, etc MiniPCIe slot Misc: Reset button, JTAG interface Currently booting only from µSD card is supported. The boards depending on date of dispatch can come with various U-Boot versions. For the newest version 2017.03-armada-17.10 no manual intervention should be needed to boot OpenWrt image. For the older ones it's necessary to modify default U-Boot environment: 1. Interrupt boot process to run U-Boot command line, 2. Run following commands: (for version 2017.03-armada-17.06 and 2017.03-armada-17.08) setenv bootcmd "load mmc 0:1 0x4d00000 boot.scr; source 0x4d00000" saveenv (for version 2015.01-armada-17.02 and 2015.01-armada-17.04) setenv bootargs "console=ttyMV0,115200 root=/dev/mmcblk0p2 rw rootwait" setenv bootcmd "ext4load mmc 0:1 ${fdt_addr} armada-3720-espressobin.dtb; ext4load mmc 0:1 ${kernel_addr} Image; booti ${kernel_addr} - ${fdt_addr}" saveenv 3. Poweroff, insert SD card with OpenWrt image, boot and enjoy. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
Diffstat (limited to 'target/linux/mvebu/patches-4.14/522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch')
-rw-r--r--target/linux/mvebu/patches-4.14/522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch66
1 files changed, 66 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-4.14/522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch b/target/linux/mvebu/patches-4.14/522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch
new file mode 100644
index 0000000000..0dead7d61d
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch
@@ -0,0 +1,66 @@
+From patchwork Thu Sep 28 12:58:32 2017
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [v2, 1/7] PCI: aardvark: fix logic in PCI configuration read/write
+ functions
+X-Patchwork-Submitter: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+X-Patchwork-Id: 819586
+Message-Id: <20170928125838.11887-2-thomas.petazzoni@free-electrons.com>
+To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org
+Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
+ Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement
+ <gregory.clement@free-electrons.com>,
+ Nadav Haklai <nadavh@marvell.com>, Hanna Hawa <hannah@marvell.com>,
+ Yehuda Yitschak <yehuday@marvell.com>,
+ linux-arm-kernel@lists.infradead.org, Antoine Tenart
+ <antoine.tenart@free-electrons.com>, =?utf-8?q?Miqu=C3=A8l_Raynal?=
+ <miquel.raynal@free-electrons.com>, Victor Gu <xigu@marvell.com>,
+ stable@vger.kernel.org, Thomas Petazzoni
+ <thomas.petazzoni@free-electrons.com>
+Date: Thu, 28 Sep 2017 14:58:32 +0200
+From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+List-Id: <linux-pci.vger.kernel.org>
+
+From: Victor Gu <xigu@marvell.com>
+
+The PCI configuration space read/write functions were special casing
+the situation where PCI_SLOT(devfn) != 0, and returned
+PCIBIOS_DEVICE_NOT_FOUND in this case.
+
+However, will this is what is intended for the root bus, it is not
+intended for the child busses, as it prevents discovering devices with
+PCI_SLOT(x) != 0. Therefore, we return PCIBIOS_DEVICE_NOT_FOUND only
+if we're on the root bus.
+
+Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
+Cc: <stable@vger.kernel.org>
+Signed-off-by: Victor Gu <xigu@marvell.com>
+Reviewed-by: Wilson Ding <dingwei@marvell.com>
+Reviewed-by: Nadav Haklai <nadavh@marvell.com>
+[Thomas: tweak commit log.]
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+---
+ drivers/pci/host/pci-aardvark.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/pci/host/pci-aardvark.c
++++ b/drivers/pci/host/pci-aardvark.c
+@@ -440,7 +440,7 @@ static int advk_pcie_rd_conf(struct pci_
+ u32 reg;
+ int ret;
+
+- if (PCI_SLOT(devfn) != 0) {
++ if ((bus->number == pcie->root_bus_nr) && (PCI_SLOT(devfn) != 0)) {
+ *val = 0xffffffff;
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ }
+@@ -494,7 +494,7 @@ static int advk_pcie_wr_conf(struct pci_
+ int offset;
+ int ret;
+
+- if (PCI_SLOT(devfn) != 0)
++ if ((bus->number == pcie->root_bus_nr) && (PCI_SLOT(devfn) != 0))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ if (where % size)