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author | Hauke Mehrtens <hauke@hauke-m.de> | 2017-12-21 12:13:30 +0100 |
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committer | Hauke Mehrtens <hauke@hauke-m.de> | 2018-02-13 22:29:56 +0100 |
commit | 4ccad922293a729369712026f647f85266322851 (patch) | |
tree | 9eb0ce493cf7610fe4bf2d327fdabb02ffc380e1 /target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch | |
parent | 47106f55e0b630ea448ea4e5be67b6791c0d7a93 (diff) | |
download | upstream-4ccad922293a729369712026f647f85266322851.tar.gz upstream-4ccad922293a729369712026f647f85266322851.tar.bz2 upstream-4ccad922293a729369712026f647f85266322851.zip |
mvebu: Add support for kernel 4.14
Add support for kernel 4.14 to the mvebu target.
This also replaces the old sfp and phylink patches with new versions
from Russell's clearfog-4.13 branch
http://git.arm.linux.org.uk/cgit/linux-arm.git/log/?h=clearfog-4.13
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch')
-rw-r--r-- | target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch b/target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch new file mode 100644 index 0000000000..504d110264 --- /dev/null +++ b/target/linux/mvebu/patches-4.14/401-pci-mvebu-time-out-reset-on-link-up.patch @@ -0,0 +1,60 @@ +From 287b9df160b6159f8d385424904f8bac501280c1 Mon Sep 17 00:00:00 2001 +From: Russell King <rmk+kernel@armlinux.org.uk> +Date: Sat, 9 Jul 2016 10:58:16 +0100 +Subject: pci: mvebu: time out reset on link up + +If the port reports that the link is up while we are resetting, there's +little point in waiting for the full duration. + +Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> +--- + drivers/pci/host/pci-mvebu.c | 20 ++++++++++++++------ + 1 file changed, 14 insertions(+), 6 deletions(-) + +--- a/drivers/pci/host/pci-mvebu.c ++++ b/drivers/pci/host/pci-mvebu.c +@@ -1167,6 +1167,7 @@ static int mvebu_pcie_powerup(struct mve + + if (port->reset_gpio) { + u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000; ++ unsigned int i; + + of_property_read_u32(port->dn, "reset-delay-us", + &reset_udelay); +@@ -1174,7 +1175,13 @@ static int mvebu_pcie_powerup(struct mve + udelay(100); + + gpiod_set_value_cansleep(port->reset_gpio, 0); +- msleep(reset_udelay / 1000); ++ for (i = 0; i < reset_udelay; i += 1000) { ++ if (mvebu_pcie_link_up(port)) ++ break; ++ msleep(1); ++ } ++ ++ printk("%s: reset completed in %dus\n", port->name, i); + } + + return 0; +@@ -1261,15 +1268,16 @@ static int mvebu_pcie_probe(struct platf + if (!child) + continue; + +- ret = mvebu_pcie_powerup(port); +- if (ret < 0) +- continue; +- + port->base = mvebu_pcie_map_registers(pdev, child, port); + if (IS_ERR(port->base)) { + dev_err(dev, "%s: cannot map registers\n", port->name); + port->base = NULL; +- mvebu_pcie_powerdown(port); ++ continue; ++ } ++ ++ ret = mvebu_pcie_powerup(port); ++ if (ret < 0) { ++ port->base = NULL; + continue; + } + |