diff options
author | Florian Fainelli <florian@openwrt.org> | 2013-01-08 22:20:16 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2013-01-08 22:20:16 +0000 |
commit | 91e3a3252f68589aaa7d5131cbe77c2c552c1df4 (patch) | |
tree | a5cbc0f5235b30a249d4532479600f183be2eec6 /target/linux/mvebu/patches-3.8/005-arm_mvebu_use_global_interrupts_for_gpio.patch | |
parent | b5988e0640bd2ad96cc2c0b79197873f7ab9085c (diff) | |
download | upstream-91e3a3252f68589aaa7d5131cbe77c2c552c1df4.tar.gz upstream-91e3a3252f68589aaa7d5131cbe77c2c552c1df4.tar.bz2 upstream-91e3a3252f68589aaa7d5131cbe77c2c552c1df4.zip |
mvebu: add inital support for Marvell Armada XP/370 SoCs
This brings in the initial support for the Marvell Armada XP/370 SoCs.
Successfully tested on RD-A370-A1 and DB-MV784MP-GP boards the following
interfaces:
- Ethernet
- SDIO
- GPIOs
- SATA
Signed-off-by: Florian Fainelli <florian@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35058 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/mvebu/patches-3.8/005-arm_mvebu_use_global_interrupts_for_gpio.patch')
-rw-r--r-- | target/linux/mvebu/patches-3.8/005-arm_mvebu_use_global_interrupts_for_gpio.patch | 174 |
1 files changed, 174 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-3.8/005-arm_mvebu_use_global_interrupts_for_gpio.patch b/target/linux/mvebu/patches-3.8/005-arm_mvebu_use_global_interrupts_for_gpio.patch new file mode 100644 index 0000000000..726e2529fc --- /dev/null +++ b/target/linux/mvebu/patches-3.8/005-arm_mvebu_use_global_interrupts_for_gpio.patch @@ -0,0 +1,174 @@ +The Armada XP GPIO controller has two ways of notifying interrupts: +using global interrupts or using per-CPU interrupts. In an attempt to +use the best available features, the 'marvell,armadaxp-gpio' +compatible string selects a variant of the gpio-mvebu driver that +makes use of the per-CPU interrupts. + +Unfortunately, this doesn't work properly in a SMP context, because we +fall into cases where the GPIO interrupt is enabled on CPU X at the +GPIO controller level, but on CPU Y at the interrupt controller +level. It is not yet clear how to fix that easily. + +So for 3.8, our approach is to switch to global interrupts for GPIOs, +so that we do not fall into this per-CPU interrupts problem. + +This patch therefore fixes GPIO interrupts on Armada XP +platforms. Without this patch, GPIO interrupts simply do not work +reliably, because their proper operation depends on which CPU the code +requesting the interrupt is running. + +Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> +--- +This is 3.8-rc material. +--- + arch/arm/boot/dts/armada-xp-mv78230.dtsi | 14 ++++++-------- + arch/arm/boot/dts/armada-xp-mv78260.dtsi | 21 +++++++++------------ + arch/arm/boot/dts/armada-xp-mv78460.dtsi | 21 +++++++++------------ + 3 files changed, 24 insertions(+), 32 deletions(-) + +diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi +index 271855a..e041f42 100644 +--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi ++++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi +@@ -50,27 +50,25 @@ + }; + + gpio0: gpio@d0018100 { +- compatible = "marvell,armadaxp-gpio"; +- reg = <0xd0018100 0x40>, +- <0xd0018800 0x30>; ++ compatible = "marvell,orion-gpio"; ++ reg = <0xd0018100 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; +- interrupts = <16>, <17>, <18>, <19>; ++ interrupts = <82>, <83>, <84>, <85>; + }; + + gpio1: gpio@d0018140 { +- compatible = "marvell,armadaxp-gpio"; +- reg = <0xd0018140 0x40>, +- <0xd0018840 0x30>; ++ compatible = "marvell,orion-gpio"; ++ reg = <0xd0018140 0x40>; + ngpios = <17>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; +- interrupts = <20>, <21>, <22>; ++ interrupts = <87>, <88>, <89>; + }; + }; + }; +diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi +index 1c1937d..9e23bd8 100644 +--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi ++++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi +@@ -51,39 +51,36 @@ + }; + + gpio0: gpio@d0018100 { +- compatible = "marvell,armadaxp-gpio"; +- reg = <0xd0018100 0x40>, +- <0xd0018800 0x30>; ++ compatible = "marvell,orion-gpio"; ++ reg = <0xd0018100 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; +- interrupts = <16>, <17>, <18>, <19>; ++ interrupts = <82>, <83>, <84>, <85>; + }; + + gpio1: gpio@d0018140 { +- compatible = "marvell,armadaxp-gpio"; +- reg = <0xd0018140 0x40>, +- <0xd0018840 0x30>; ++ compatible = "marvell,orion-gpio"; ++ reg = <0xd0018140 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; +- interrupts = <20>, <21>, <22>, <23>; ++ interrupts = <87>, <88>, <89>, <90>; + }; + + gpio2: gpio@d0018180 { +- compatible = "marvell,armadaxp-gpio"; +- reg = <0xd0018180 0x40>, +- <0xd0018870 0x30>; ++ compatible = "marvell,orion-gpio"; ++ reg = <0xd0018180 0x40>; + ngpios = <3>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; +- interrupts = <24>; ++ interrupts = <91>; + }; + + ethernet@d0034000 { +diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi +index 4905cf3..9659661 100644 +--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi ++++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi +@@ -66,39 +66,36 @@ + }; + + gpio0: gpio@d0018100 { +- compatible = "marvell,armadaxp-gpio"; +- reg = <0xd0018100 0x40>, +- <0xd0018800 0x30>; ++ compatible = "marvell,orion-gpio"; ++ reg = <0xd0018100 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; +- interrupts = <16>, <17>, <18>, <19>; ++ interrupts = <82>, <83>, <84>, <85>; + }; + + gpio1: gpio@d0018140 { +- compatible = "marvell,armadaxp-gpio"; +- reg = <0xd0018140 0x40>, +- <0xd0018840 0x30>; ++ compatible = "marvell,orion-gpio"; ++ reg = <0xd0018140 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; +- interrupts = <20>, <21>, <22>, <23>; ++ interrupts = <87>, <88>, <89>, <90>; + }; + + gpio2: gpio@d0018180 { +- compatible = "marvell,armadaxp-gpio"; +- reg = <0xd0018180 0x40>, +- <0xd0018870 0x30>; ++ compatible = "marvell,orion-gpio"; ++ reg = <0xd0018180 0x40>; + ngpios = <3>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupts-cells = <2>; +- interrupts = <24>; ++ interrupts = <91>; + }; + + ethernet@d0034000 { +-- +1.7.9.5 |