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authorImre Kaloz <kaloz@openwrt.org>2015-12-11 13:38:21 +0000
committerImre Kaloz <kaloz@openwrt.org>2015-12-11 13:38:21 +0000
commit3357033b7388819106bc042bfe94f9a6ea7c81fa (patch)
treee33165365607618fdba211c9a9c4a1d46b6be43a /target/linux/mvebu/patches-3.18/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch
parent58e9e35444514781a6e52e6187a1fea815788683 (diff)
downloadupstream-3357033b7388819106bc042bfe94f9a6ea7c81fa.tar.gz
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mvebu: drop support for old kernels
Signed-off-by: Imre Kaloz <kaloz@openwrt.org> SVN-Revision: 47835
Diffstat (limited to 'target/linux/mvebu/patches-3.18/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch')
-rw-r--r--target/linux/mvebu/patches-3.18/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch52
1 files changed, 0 insertions, 52 deletions
diff --git a/target/linux/mvebu/patches-3.18/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch b/target/linux/mvebu/patches-3.18/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch
deleted file mode 100644
index 48f93944bf..0000000000
--- a/target/linux/mvebu/patches-3.18/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-Document the optional parameters needed for PWM operation of gpio
-lines.
-
-Signed-off-by: Andrew Lunn <andrew@lunn.ch>
----
- .../devicetree/bindings/gpio/gpio-mvebu.txt | 31 ++++++++++++++++++++++
- 1 file changed, 31 insertions(+)
-
---- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
-+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
-@@ -38,6 +38,23 @@ Required properties:
- - #gpio-cells: Should be two. The first cell is the pin number. The
- second cell is reserved for flags, unused at the moment.
-
-+Optional properties:
-+
-+In order to use the gpio lines in PWM mode, some additional optional
-+properties are required. Only Armada 370 and XP supports these
-+properties.
-+
-+- reg: an additional register set is needed, for the GPIO Blink
-+ Counter on/off registers.
-+
-+- reg-names: Must contain an entry "pwm" corresponding to the
-+ additional register range needed for pwm operation.
-+
-+- #pwm-cells: Should be two. The first cell is the pin number. The
-+ second cell is reserved for flags, unused at the moment.
-+
-+- clocks: Must be a phandle to the clock for the gpio controller.
-+
- Example:
-
- gpio0: gpio@d0018100 {
-@@ -51,3 +68,17 @@ Example:
- #interrupt-cells = <2>;
- interrupts = <16>, <17>, <18>, <19>;
- };
-+
-+ gpio1: gpio@18140 {
-+ compatible = "marvell,orion-gpio";
-+ reg = <0x18140 0x40>, <0x181c8 0x08>;
-+ reg-names = "gpio", "pwm";
-+ ngpios = <17>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ #pwm-cells = <2>;
-+ interrupt-controller;
-+ #interrupt-cells = <2>;
-+ interrupts = <87>, <88>, <89>;
-+ clocks = <&coreclk 0>;
-+ };