mvebu: backport mainline patches from kernel 3.12

This is a backport of the patches accepted to the Linux mainline related to
mvebu SoC (Armada XP and Armada 370) between Linux v3.11, and Linux v3.12.
This work mainly covers:

* Ground work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c)
  between the PXA family,and the Armada family.
* Further updates to the mvebu MBus.
* Work and ground work for enabling MSI on the Armada family.
* some phy / mdio bus initialization related work.
* Device tree binding documentation update.

Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com>
CC: Luka Perkov <luka@openwrt.org>

SVN-Revision: 39565

1 files changed, 167 insertions, 0 deletions

diff --git a/target/linux/mvebu/patches-3.10/0056-ARM-mvebu-Add-MBus-to-Armada-370-XP-device-tree.patch b/target/linux/mvebu/patches-3.10/0056-ARM-mvebu-Add-MBus-to-Armada-370-XP-device-tree.patch
new file mode 100644
index 0000000000..ef7b59d9f4
--- /dev/null
+++ b/target/linux/mvebu/patches-3.10/0056-ARM-mvebu-Add-MBus-to-Armada-370-XP-device-tree.patch
@@ -0,0 +1,167 @@
+From 8298866bfa7fe9c1e33055322c415f612c16a477 Mon Sep 17 00:00:00 2001
+From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
+Date: Tue, 28 May 2013 08:56:04 -0300
+Subject: [PATCH 056/203] ARM: mvebu: Add MBus to Armada 370/XP device tree
+
+The Armada 370/XP SoC family has a completely configurable address
+space handled by the MBus controller.
+
+This patch introduces the device tree layout of MBus, making the
+'soc' node as mbus-compatible.
+Since every peripheral/controller is a child of this 'soc' node,
+this makes all of them sit behind the mbus, thus describing the
+hardware accurately.
+
+A translation entry has been added for the internal-regs mapping.
+This can't be done in the common armada-370-xp.dtsi because A370
+and AXP have different addressing width.
+
+Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
+Tested-by: Andrew Lunn <andrew@lunn.ch>
+Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+---
+ arch/arm/boot/dts/armada-370-db.dts              |  2 ++
+ arch/arm/boot/dts/armada-370-mirabox.dts         |  2 ++
+ arch/arm/boot/dts/armada-370-rd.dts              |  2 ++
+ arch/arm/boot/dts/armada-370-xp.dtsi             | 15 ++++++++++-----
+ arch/arm/boot/dts/armada-370.dtsi                |  4 ++--
+ arch/arm/boot/dts/armada-xp-db.dts               |  4 +---
+ arch/arm/boot/dts/armada-xp-gp.dts               |  4 +---
+ arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts |  4 +---
+ arch/arm/boot/dts/armada-xp.dtsi                 |  2 ++
+ 9 files changed, 23 insertions(+), 16 deletions(-)
+
+--- a/arch/arm/boot/dts/armada-370-db.dts
++++ b/arch/arm/boot/dts/armada-370-db.dts
+@@ -30,6 +30,8 @@
+ 	};
+ 
+ 	soc {
++		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;
++
+ 		internal-regs {
+ 			serial@12000 {
+ 				clock-frequency = <200000000>;
+--- a/arch/arm/boot/dts/armada-370-mirabox.dts
++++ b/arch/arm/boot/dts/armada-370-mirabox.dts
+@@ -25,6 +25,8 @@
+ 	};
+ 
+ 	soc {
++		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;
++
+ 		internal-regs {
+ 			serial@12000 {
+ 				clock-frequency = <200000000>;
+--- a/arch/arm/boot/dts/armada-370-rd.dts
++++ b/arch/arm/boot/dts/armada-370-rd.dts
+@@ -28,6 +28,8 @@
+ 	};
+ 
+ 	soc {
++		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;
++
+ 		internal-regs {
+ 			serial@12000 {
+ 				clock-frequency = <200000000>;
+--- a/arch/arm/boot/dts/armada-370-xp.dtsi
++++ b/arch/arm/boot/dts/armada-370-xp.dtsi
+@@ -18,6 +18,8 @@
+ 
+ /include/ "skeleton64.dtsi"
+ 
++#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
++
+ / {
+ 	model = "Marvell Armada 370 and XP SoC";
+ 	compatible = "marvell,armada-370-xp";
+@@ -29,18 +31,21 @@
+ 	};
+ 
+ 	soc {
+-		#address-cells = <1>;
++		#address-cells = <2>;
+ 		#size-cells = <1>;
+-		compatible = "simple-bus";
++		controller = <&mbusc>;
+ 		interrupt-parent = <&mpic>;
+-		ranges = <0          0 0xd0000000 0x0100000 /* internal registers */
+-			  0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
+ 
+ 		internal-regs {
+ 			compatible = "simple-bus";
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
+-			ranges;
++			ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
++
++			mbusc: mbus-controller@20000 {
++				compatible = "marvell,mbus-controller";
++				reg = <0x20000 0x100>, <0x20180 0x20>;
++			};
+ 
+ 			mpic: interrupt-controller@20000 {
+ 				compatible = "marvell,mpic";
+--- a/arch/arm/boot/dts/armada-370.dtsi
++++ b/arch/arm/boot/dts/armada-370.dtsi
+@@ -29,8 +29,8 @@
+ 	};
+ 
+ 	soc {
+-		ranges = <0          0xd0000000 0x0100000 /* internal registers */
+-			  0xe0000000 0xe0000000 0x8100000 /* PCIe */>;
++		compatible = "marvell,armada370-mbus", "simple-bus";
++
+ 		internal-regs {
+ 			system-controller@18200 {
+ 				compatible = "marvell,armada-370-xp-system-controller";
+--- a/arch/arm/boot/dts/armada-xp-db.dts
++++ b/arch/arm/boot/dts/armada-xp-db.dts
+@@ -30,9 +30,7 @@
+ 	};
+ 
+ 	soc {
+-		ranges = <0          0 0xd0000000 0x100000	/* Internal registers 1MiB */
+-			  0xe0000000 0 0xe0000000 0x8100000     /* PCIe */
+-			  0xf0000000 0 0xf0000000 0x1000000>;	/* Device Bus, NOR 16MiB   */
++		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000>;
+ 
+ 		internal-regs {
+ 			serial@12000 {
+--- a/arch/arm/boot/dts/armada-xp-gp.dts
++++ b/arch/arm/boot/dts/armada-xp-gp.dts
+@@ -39,9 +39,7 @@
+ 	};
+ 
+ 	soc {
+-		ranges = <0          0 0xd0000000 0x100000  /* Internal registers 1MiB */
+-			  0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
+-			  0xf0000000 0 0xf0000000 0x1000000 /* Device Bus, NOR 16MiB  */>;
++		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000>;
+ 
+ 		internal-regs {
+ 			serial@12000 {
+--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
++++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+@@ -27,9 +27,7 @@
+ 	};
+ 
+ 	soc {
+-		ranges = <0          0 0xd0000000 0x100000	/* Internal registers 1MiB */
+-			  0xe0000000 0 0xe0000000 0x8100000     /* PCIe */
+-			  0xf0000000 0 0xf0000000 0x8000000     /* Device Bus, NOR 128MiB   */>;
++		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000>;
+ 
+ 		internal-regs {
+ 			serial@12000 {
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -23,6 +23,8 @@
+ 	compatible = "marvell,armadaxp", "marvell,armada-370-xp";
+ 
+ 	soc {
++		compatible = "marvell,armadaxp-mbus", "simple-bus";
++
+ 		internal-regs {
+ 			L2: l2-cache {
+ 				compatible = "marvell,aurora-system-cache";