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author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2019-07-08 11:50:23 +0200 |
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committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2019-12-22 01:24:23 +0100 |
commit | edb0a936f0af134ed2fb01c05e5d31b9944d2454 (patch) | |
tree | e7abc2f1ed6e8cfc97f3922dc60372c6b5fde6a2 /target/linux/mpc85xx | |
parent | b3bdfd5df55b104f3affea116a3c54075ea6549c (diff) | |
download | upstream-edb0a936f0af134ed2fb01c05e5d31b9944d2454.tar.gz upstream-edb0a936f0af134ed2fb01c05e5d31b9944d2454.tar.bz2 upstream-edb0a936f0af134ed2fb01c05e5d31b9944d2454.zip |
lantiq: dts: define the SPI pins in {amazonse,ar9,vr9}.dtsi
Define the SPI pins in the corresponding SoCs.dtsi and assign them to
the SPI controller node. All known boards use CS4 and it's likely that
this is hardcoded in bootrom so this doesn't bother with having
per-board SPI pinmux settings.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Diffstat (limited to 'target/linux/mpc85xx')
0 files changed, 0 insertions, 0 deletions