mpc85xx: add 3.14 kernel support for mpc85xx platform

This patch adds 3.14 kernel support for the mpc85xx platform.
Works fine here with a TL-WDR4900 which seems to be the only
supported device using this platform.
There might be differences depending on HW version, therefore
I'd ask others to test too.

Changes to 3.10
  missing config options added to 3.14 config file
  patch 001: rebased
  patch 100: rebased
  patch 110: rebased
  patch 120: rebased
  patch 130: rebased
  patch 140: minor adjustment
  patch 200: removed, change went upstream
  patch 210: rebased
  patch 220: removed, change went upstream
  patch 750: new, fixes an issue with ethernet port autoneg being
             disabled due to changes in kernel phy handling

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>

SVN-Revision: 43308

1 files changed, 636 insertions, 0 deletions

diff --git a/target/linux/mpc85xx/patches-3.14/140-powerpc-85xx-tl-wdr4900-v1-support.patch b/target/linux/mpc85xx/patches-3.14/140-powerpc-85xx-tl-wdr4900-v1-support.patch
new file mode 100644
index 0000000000..5cefaa9203
--- /dev/null
+++ b/target/linux/mpc85xx/patches-3.14/140-powerpc-85xx-tl-wdr4900-v1-support.patch
@@ -0,0 +1,636 @@
+From 406d86e5990ac171f18ef6e2973672d8fbfe1556 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Wed, 20 Feb 2013 08:40:33 +0100
+Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
+ board
+
+This patch adds support for the TP-Link TL-WDR4900 v1
+concurrent dual-band wireless router. The devices uses
+the Freescale P1014 SoC.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ arch/powerpc/boot/Makefile                  |   3 +
+ arch/powerpc/boot/cuboot-tl-wdr4900-v1.c    | 164 +++++++++++++++++++++
+ arch/powerpc/boot/dts/tl-wdr4900-v1.dts     | 212 ++++++++++++++++++++++++++++
+ arch/powerpc/boot/wrapper                   |   4 +
+ arch/powerpc/platforms/85xx/Kconfig         |  11 ++
+ arch/powerpc/platforms/85xx/Makefile        |   1 +
+ arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 +++++++++++++++++++
+ 7 files changed, 540 insertions(+)
+ create mode 100644 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
+ create mode 100644 arch/powerpc/boot/dts/tl-wdr4900-v1.dts
+ create mode 100644 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
+
+diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
+index 90e9d95..663fd31 100644
+--- a/arch/powerpc/boot/Makefile
++++ b/arch/powerpc/boot/Makefile
+@@ -99,6 +99,8 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
+ src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
+ src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
+ src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
++src-plat-$(CONFIG_TL_WDR4900_V1) += cuboot-tl-wdr4900-v1.c
++
+ 
+ src-wlib := $(sort $(src-wlib-y))
+ src-plat := $(sort $(src-plat-y))
+@@ -279,6 +281,7 @@ image-$(CONFIG_TQM8555)			+= cuImage.tqm8555
+ image-$(CONFIG_TQM8560)			+= cuImage.tqm8560
+ image-$(CONFIG_SBC8548)			+= cuImage.sbc8548
+ image-$(CONFIG_KSI8560)			+= cuImage.ksi8560
++image-$(CONFIG_TL_WDR4900_V1)		+= cuImage.tl-wdr4900-v1
+ 
+ # Board ports in arch/powerpc/platform/embedded6xx/Kconfig
+ image-$(CONFIG_STORCENTER)		+= cuImage.storcenter
+diff --git a/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
+new file mode 100644
+index 0000000..095e777
+--- /dev/null
++++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
+@@ -0,0 +1,164 @@
++/*
++ * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
++ *
++ * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * Based on:
++ *  cuboot-85xx.c
++ *     Author: Scott Wood <scottwood@freescale.com>
++ *     Copyright (c) 2007 Freescale Semiconductor, Inc.
++ *
++ *  simpleboot.c
++ *     Authors: Scott Wood <scottwood@freescale.com>
++ *              Grant Likely <grant.likely@secretlab.ca>
++ *     Copyright (c) 2007 Freescale Semiconductor, Inc.
++ *     Copyright (c) 2008 Secret Lab Technologies Ltd.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include "ops.h"
++#include "types.h"
++#include "io.h"
++#include "stdio.h"
++#include <libfdt.h>
++
++BSS_STACK(4*1024);
++
++static unsigned long bus_freq;
++static unsigned long int_freq;
++static u64 mem_size;
++static unsigned char enetaddr[6];
++
++static void process_boot_dtb(void *boot_dtb)
++{
++	const u32 *na, *ns, *reg, *val32;
++	const char *path;
++	u64 memsize64;
++	int node, size, i;
++
++	/* Make sure FDT blob is sane */
++	if (fdt_check_header(boot_dtb) != 0)
++		fatal("Invalid device tree blob\n");
++
++	/* Find the #address-cells and #size-cells properties */
++	node = fdt_path_offset(boot_dtb, "/");
++	if (node < 0)
++		fatal("Cannot find root node\n");
++	na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
++	if (!na || (size != 4))
++		fatal("Cannot find #address-cells property");
++
++	ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
++	if (!ns || (size != 4))
++		fatal("Cannot find #size-cells property");
++
++	/* Find the memory range */
++	node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
++					     "memory", sizeof("memory"));
++	if (node < 0)
++		fatal("Cannot find memory node\n");
++	reg = fdt_getprop(boot_dtb, node, "reg", &size);
++	if (size < (*na+*ns) * sizeof(u32))
++		fatal("cannot get memory range\n");
++
++	/* Only interested in memory based at 0 */
++	for (i = 0; i < *na; i++)
++		if (*reg++ != 0)
++			fatal("Memory range is not based at address 0\n");
++
++	/* get the memsize and trucate it to under 4G on 32 bit machines */
++	memsize64 = 0;
++	for (i = 0; i < *ns; i++)
++		memsize64 = (memsize64 << 32) | *reg++;
++	if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
++		memsize64 = 0xffffffff;
++
++	mem_size = memsize64;
++
++	/* get clock frequencies */
++	node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
++					     "cpu", sizeof("cpu"));
++	if (!node)
++		fatal("Cannot find cpu node\n");
++
++	val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
++	if (!val32 || (size != 4))
++		fatal("Cannot get clock frequency");
++
++	int_freq = *val32;
++
++	val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
++	if (!val32 || (size != 4))
++		fatal("Cannot get bus frequency");
++
++	bus_freq = *val32;
++
++	path = fdt_get_alias(boot_dtb, "ethernet0");
++	if (path) {
++		const void *p;
++
++		node = fdt_path_offset(boot_dtb, path);
++		if (node < 0)
++			fatal("Cannot find ethernet0 node");
++
++		p = fdt_getprop(boot_dtb, node, "mac-address", &size);
++		if (!p || (size < 6)) {
++			printf("no mac-address property, finding local\n\r");
++			p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
++		}
++
++		if (!p || (size < 6))
++			fatal("cannot get MAC addres");
++
++		memcpy(enetaddr, p, sizeof(enetaddr));
++	}
++}
++
++static void platform_fixups(void)
++{
++	void *soc;
++
++	dt_fixup_memory(0, mem_size);
++
++	dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
++	dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
++
++	/* Unfortunately, the specific model number is encoded in the
++	 * soc node name in existing dts files -- once that is fixed,
++	 * this can do a simple path lookup.
++	 */
++	soc = find_node_by_devtype(NULL, "soc");
++	if (soc) {
++		void *serial = NULL;
++
++		setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
++
++		while ((serial = find_node_by_devtype(serial, "serial"))) {
++			if (get_parent(serial) != soc)
++				continue;
++
++			setprop(serial, "clock-frequency", &bus_freq,
++				sizeof(bus_freq));
++		}
++	}
++}
++
++void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
++                   unsigned long r6, unsigned long r7)
++{
++	mem_size = 64 * 1024 * 1024;
++
++	simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
++
++	fdt_init(_dtb_start);
++	serial_console_init();
++
++	printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
++
++	process_boot_dtb((void *) r3);
++
++	platform_ops.fixups = platform_fixups;
++}
+diff --git a/arch/powerpc/boot/dts/tl-wdr4900-v1.dts b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
+new file mode 100644
+index 0000000..49e516c
+--- /dev/null
++++ b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
+@@ -0,0 +1,212 @@
++/*
++ * TP-Link TL-WDR4900 v1 Device Tree Source
++ *
++ * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++
++/include/ "fsl/p1010si-pre.dtsi"
++
++/ {
++	model = "TP-Link TL-WDR4900 v1";
++	compatible = "tp-link,TL-WDR4900v1";
++
++	chosen {
++		bootargs = "console=ttyS0,115200";
++/*
++		linux,stdout-path = "/soc@ffe00000/serial@4500";
++*/
++	};
++
++	aliases {
++		spi0 = &spi0;
++	};
++
++	memory {
++		device_type = "memory";
++	};
++
++	soc: soc@ffe00000 {
++		ranges = <0x0 0x0 0xffe00000 0x100000>;
++
++		spi0: spi@7000 {
++			flash@0 {
++				#address-cells = <1>;
++				#size-cells = <1>;
++				compatible = "spansion,s25fl129p1";
++				reg = <0>;
++				spi-max-frequency = <25000000>;
++
++				u-boot@0 {
++					reg = <0x0 0x0050000>;
++					label = "u-boot";
++					read-only;
++				};
++
++				dtb@50000 {
++					reg = <0x00050000 0x00010000>;
++					label = "dtb";
++					read-only;
++				};
++
++				kernel@60000 {
++					reg = <0x00060000 0x002a0000>;
++					label = "kernel";
++				};
++
++				rootfs@300000 {
++					reg = <0x00300000 0x00ce0000>;
++					label = "rootfs";
++				};
++
++				config@fe0000 {
++					reg = <0x00fe0000 0x00010000>;
++					label = "config";
++					read-only;
++				};
++
++				caldata@ff0000 {
++					reg = <0x00ff0000 0x00010000>;
++					label = "caldata";
++					read-only;
++				};
++
++				firmware@60000 {
++					reg = <0x00060000 0x00f80000>;
++					label = "firmware";
++				};
++			};
++		};
++
++		gpio0: gpio-controller@f000 {
++		};
++
++		usb@22000 {
++			phy_type = "utmi";
++			dr_mode = "host";
++		};
++
++		mdio@24000 {
++			phy0: ethernet-phy@0 {
++				reg = <0x0>;
++				qca,ar8327-initvals = <
++					0x00004 0x07600000 /* PAD0_MODE */
++					0x00008 0x00000000 /* PAD5_MODE */
++					0x0000c 0x01000000 /* PAD6_MODE */
++					0x00010 0x40000000 /* POWER_ON_STRIP */
++					0x00050 0xcf35cf35 /* LED_CTRL0 */
++					0x00054 0xcf35cf35 /* LED_CTRL1 */
++					0x00058 0xcf35cf35 /* LED_CTRL2 */
++					0x0005c 0x03ffff00 /* LED_CTRL3 */
++					0x0007c 0x0000007e /* PORT0_STATUS */
++				>;
++			};
++		};
++
++		mdio@25000 {
++			status = "disabled";
++		};
++
++		mdio@26000 {
++			status = "disabled";
++		};
++
++		enet0: ethernet@b0000 {
++			phy-handle = <&phy0>;
++			phy-connection-type = "rgmii-id";
++		};
++
++		enet1: ethernet@b1000 {
++			status = "disabled";
++		};
++
++		enet2: ethernet@b2000 {
++			status = "disabled";
++		};
++
++		sdhc@2e000 {
++			status = "disabled";
++		};
++
++		serial1: serial@4600 {
++			status = "disabled";
++		};
++
++		can0: can@1c000 {
++			status = "disabled";
++		};
++
++		can1: can@1d000 {
++			status = "disabled";
++		};
++	};
++
++	pci0: pcie@ffe09000 {
++		reg = <0 0xffe09000 0 0x1000>;
++		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
++			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
++		pcie@0 {
++			ranges = <0x2000000 0x0 0xa0000000
++				  0x2000000 0x0 0xa0000000
++				  0x0 0x20000000
++
++				  0x1000000 0x0 0x0
++				  0x1000000 0x0 0x0
++				  0x0 0x100000>;
++		};
++	};
++
++	pci1: pcie@ffe0a000 {
++		reg = <0 0xffe0a000 0 0x1000>;
++		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
++			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
++		pcie@0 {
++			ranges = <0x2000000 0x0 0x80000000
++				  0x2000000 0x0 0x80000000
++				  0x0 0x20000000
++
++				  0x1000000 0x0 0x0
++				  0x1000000 0x0 0x0
++				  0x0 0x100000>;
++		};
++	};
++
++	ifc: ifc@ffe1e000 {
++		status = "disabled";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		system {
++			gpios = <&gpio0 2 1>; /* active low */
++			label = "tp-link:blue:system";
++		};
++
++		usb1 {
++			gpios = <&gpio0 3 1>; /* active low */
++			label = "tp-link:green:usb1";
++		};
++
++		usb2 {
++			gpios = <&gpio0 4 1>; /* active low */
++			label = "tp-link:green:usb2";
++		};
++	};
++
++	buttons {
++		compatible = "gpio-keys";
++
++		reset {
++			label = "Reset button";
++			gpios = <&gpio0 5 1>; /* active low */
++			linux,code = <0x198>; /* KEY_RESTART */
++		};
++	};
++};
++
++/include/ "fsl/p1010si-post.dtsi"
+diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
+index d27a255..4b43e41 100755
+--- a/arch/powerpc/boot/wrapper
++++ b/arch/powerpc/boot/wrapper
+@@ -205,6 +205,10 @@ cuboot*)
+     *-mpc85*|*-tqm85*|*-sbc85*)
+         platformo=$object/cuboot-85xx.o
+         ;;
++    *-tl-wdr4900-v1)
++        platformo=$object/cuboot-tl-wdr4900-v1.o
++	link_address='0x1000000'
++        ;;
+     *-amigaone)
+         link_address='0x800000'
+         ;;
+diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
+index c17aae8..ead6513 100644
+--- a/arch/powerpc/platforms/85xx/Kconfig
++++ b/arch/powerpc/platforms/85xx/Kconfig
+@@ -159,6 +159,17 @@ config STX_GP3
+ 	select CPM2
+ 	select DEFAULT_UIMAGE
+ 
++config TL_WDR4900_V1
++	bool "TP-Link TL-WDR4900 v1"
++	select DEFAULT_UIMAGE
++	select ARCH_REQUIRE_GPIOLIB
++	select GPIO_MPC8XXX
++	help
++	  This option enables support for the TP-Link TL-WDR4900 v1 board.
++
++	  This board is a Concurrent Dual-Band wireless router with a
++	  Freescale P1014 SoC.
++
+ config TQM8540
+ 	bool "TQ Components TQM8540"
+ 	help
+diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
+index 25cebe7..14ca496 100644
+--- a/arch/powerpc/platforms/85xx/Makefile
++++ b/arch/powerpc/platforms/85xx/Makefile
+@@ -22,6 +22,7 @@ obj-$(CONFIG_TWR_P102x)   += twr_p102x.o
+ obj-$(CONFIG_CORENET_GENERIC)   += corenet_generic.o
+ obj-$(CONFIG_STX_GP3)	  += stx_gp3.o
+ obj-$(CONFIG_TQM85xx)	  += tqm85xx.o
++obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
+ obj-$(CONFIG_SBC8548)     += sbc8548.o
+ obj-$(CONFIG_PPA8548)     += ppa8548.o
+ obj-$(CONFIG_SOCRATES)    += socrates.o socrates_fpga_pic.o
+diff --git a/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
+new file mode 100644
+index 0000000..95afa4d
+--- /dev/null
++++ b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
+@@ -0,0 +1,145 @@
++/*
++ * TL-WDR4900 v1 board setup
++ *
++ * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * Based on:
++ *   p1010rdb.c:
++ *      P1010RDB Board Setup
++ *      Copyright 2011 Freescale Semiconductor Inc.
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++
++#include <linux/stddef.h>
++#include <linux/kernel.h>
++#include <linux/pci.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/of_platform.h>
++#include <linux/ath9k_platform.h>
++#include <linux/leds.h>
++
++#include <asm/time.h>
++#include <asm/machdep.h>
++#include <asm/pci-bridge.h>
++#include <mm/mmu_decl.h>
++#include <asm/prom.h>
++#include <asm/udbg.h>
++#include <asm/mpic.h>
++
++#include <sysdev/fsl_soc.h>
++#include <sysdev/fsl_pci.h>
++
++#include "mpc85xx.h"
++
++void __init tl_wdr4900_v1_pic_init(void)
++{
++	struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
++	  MPIC_SINGLE_DEST_CPU,
++	  0, 256, " OpenPIC  ");
++
++	BUG_ON(mpic == NULL);
++
++	mpic_init(mpic);
++}
++
++#ifdef CONFIG_PCI
++static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
++	{
++		.name		= "tp-link:blue:wps",
++		.gpio		= 1,
++		.active_low	= 1,
++	},
++};
++
++static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
++	.led_pin = 0,
++	.eeprom_name = "pci_wmac0.eeprom",
++	.leds = tl_wdr4900_v1_wmac_leds_gpio,
++	.num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
++};
++
++static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
++	.led_pin = 0,
++	.eeprom_name = "pci_wmac1.eeprom",
++};
++
++static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
++{
++	if (!machine_is(tl_wdr4900_v1))
++		return;
++
++	if (dev->bus->number == 1 &&
++	    PCI_SLOT(dev->devfn) == 0) {
++		dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
++		return;
++	}
++
++	if (dev->bus->number == 3 &&
++	    PCI_SLOT(dev->devfn) == 0 &&
++	    dev->device == 0xabcd) {
++		dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
++
++		/*
++		 * The PCI header of the AR9381 chip is not programmed
++		 * correctly by the bootloader and the device uses wrong
++		 * data due to that. Replace the broken values with the
++		 * correct ones.
++		 */
++		dev->device = 0x30;
++		dev->class = 0x028000;
++
++		pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
++	}
++}
++
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
++			tl_wdr4900_v1_pci_wmac_fixup);
++#endif /* CONFIG_PCI */
++
++/*
++ * Setup the architecture
++ */
++static void __init tl_wdr4900_v1_setup_arch(void)
++{
++	if (ppc_md.progress)
++		ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
++
++	fsl_pci_assign_primary();
++
++	printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
++}
++
++machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
++machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
++
++/*
++ * Called very early, device-tree isn't unflattened
++ */
++static int __init tl_wdr4900_v1_probe(void)
++{
++	unsigned long root = of_get_flat_dt_root();
++
++	if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
++		return 1;
++
++	return 0;
++}
++
++define_machine(tl_wdr4900_v1) {
++	.name			= "Freescale P1014",
++	.probe			= tl_wdr4900_v1_probe,
++	.setup_arch		= tl_wdr4900_v1_setup_arch,
++	.init_IRQ		= tl_wdr4900_v1_pic_init,
++#ifdef CONFIG_PCI
++	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
++#endif
++	.get_irq		= mpic_get_irq,
++	.restart		= fsl_rstcr_restart,
++	.calibrate_decr		= generic_calibrate_decr,
++	.progress		= udbg_progress,
++};
+-- 
+2.1.3
+