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| author | John Audia <therealgraysky@proton.me> | 2022-07-06 11:49:50 -0400 |
|---|---|---|
| committer | Christian Marangi <ansuelsmth@gmail.com> | 2022-07-19 14:35:18 +0200 |
| commit | 8ccd657629a086d3fb6520a6b91712b1ed0810b7 (patch) | |
| tree | dfd77e28234e37c0daf561534c18def21112f62e /target/linux/mediatek | |
| parent | 606fc4cd81448b974920123b5ed8de8195af5985 (diff) | |
| download | upstream-8ccd657629a086d3fb6520a6b91712b1ed0810b7.tar.gz upstream-8ccd657629a086d3fb6520a6b91712b1ed0810b7.tar.bz2 upstream-8ccd657629a086d3fb6520a6b91712b1ed0810b7.zip | |
mt7622: remove 300 MHz from dts
Due to the bug described here[1], remove the 300 MHz clock to avoid a low
voltage condition that can cause a hang when rebooting the RT3200/E8450.
This solution is probably better than the script-based work-around[2].
1. https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490
2. https://github.com/openwrt/openwrt/pull/5025
Signed-off-by: John Audia <therealgraysky@proton.me>
Tested-by: Rui Salvaterra <rsalvaterra@gmail.com>
Tested-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit d0d6b8e1833c587d0c50cac4f6324aa93b0bc8fc)
[ fix the conflict by apply the patch to kernel 5.10 ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Diffstat (limited to 'target/linux/mediatek')
| -rw-r--r-- | target/linux/mediatek/patches-5.10/722-remove-300Hz-to-prevent-freeze.patch | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-5.10/722-remove-300Hz-to-prevent-freeze.patch b/target/linux/mediatek/patches-5.10/722-remove-300Hz-to-prevent-freeze.patch new file mode 100644 index 0000000000..52069496ca --- /dev/null +++ b/target/linux/mediatek/patches-5.10/722-remove-300Hz-to-prevent-freeze.patch @@ -0,0 +1,25 @@ +--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi +@@ -23,11 +23,17 @@ + cpu_opp_table: opp-table { + compatible = "operating-points-v2"; + opp-shared; +- opp-300000000 { +- opp-hz = /bits/ 64 <300000000>; +- opp-microvolt = <950000>; +- }; +- ++ /* Due to the bug described at the link below, remove the 300 MHz clock to avoid a low ++ * voltage condition that can cause a hang when rebooting the RT3200/E8450. ++ * ++ * https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490 ++ * ++ * opp-300000000 { ++ * opp-hz = /bits/ 64 <300000000>; ++ * opp-microvolt = <950000>; ++ * }; ++ * ++ */ + opp-437500000 { + opp-hz = /bits/ 64 <437500000>; + opp-microvolt = <1000000>; |