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authorJohn Crispin <john@openwrt.org>2015-11-02 10:18:50 +0000
committerJohn Crispin <john@openwrt.org>2015-11-02 10:18:50 +0000
commit25afe99b31f4ef3d835f96545e370770c230ac44 (patch)
tree5dbe83834a0a67121c557b7549a13221317f07eb /target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch
parent12e0d2737f558e886cf698e939f1758ab6a64947 (diff)
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mediatek: add support for the new MT7623 Arm SoC
the support is still WIP. next steps are to make the pmic and ethernet work. this is the first commit to make sure nothing gets lost. Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 47354
Diffstat (limited to 'target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch')
-rw-r--r--target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch53
1 files changed, 53 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch b/target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch
new file mode 100644
index 0000000000..60990c3282
--- /dev/null
+++ b/target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch
@@ -0,0 +1,53 @@
+From e75f8b666c976aff2aa30b967f74df021d800993 Mon Sep 17 00:00:00 2001
+From: "Joe.C" <yingjoe.chen@mediatek.com>
+Date: Fri, 1 May 2015 15:43:30 +0800
+Subject: [PATCH 43/76] ARM: dts: mt8127: enable basic SMP bringup for mt8127
+
+Add arch timer node to enable arch-timer support. MT8127 firmware
+doesn't correctly setup arch-timer frequency and CNTVOFF, add
+properties to workaround this.
+
+This also set cpu enable-method to enable SMP.
+
+Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
+---
+ arch/arm/boot/dts/mt8127.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
+index aaa7862..7c2090d 100644
+--- a/arch/arm/boot/dts/mt8127.dtsi
++++ b/arch/arm/boot/dts/mt8127.dtsi
+@@ -23,6 +23,7 @@
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
++ enable-method = "mediatek,mt81xx-tz-smp";
+
+ cpu@0 {
+ device_type = "cpu";
+@@ -72,6 +73,21 @@
+ };
+ };
+
++ timer {
++ compatible = "arm,armv7-timer";
++ interrupt-parent = <&gic>;
++ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
++ IRQ_TYPE_LEVEL_LOW)>;
++ clock-frequency = <13000000>;
++ arm,cpu-registers-not-fw-configured;
++ };
++
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+--
+1.7.10.4
+