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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2015-12-02 21:52:41 +0000 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2015-12-02 21:52:41 +0000 |
| commit | f0a5f24217fbedd7ffba0a2a0bf37c1102e44ad0 (patch) | |
| tree | f4e3850683bbb922227f58993e41a4784a670932 /target/linux/mediatek/patches/0005-clk-mediatek-Add-basic-clocks-for-Mediatek-MT8173.patch | |
| parent | 40a09b93d274737c704165f687149b4956fbd45c (diff) | |
| download | upstream-f0a5f24217fbedd7ffba0a2a0bf37c1102e44ad0.tar.gz upstream-f0a5f24217fbedd7ffba0a2a0bf37c1102e44ad0.tar.bz2 upstream-f0a5f24217fbedd7ffba0a2a0bf37c1102e44ad0.zip | |
kernel: update 4.1 to 4.1.13
- two upstreamed patches removed
- compile tested all targets using 4.1
- run tested ar71xx
Signed-off-by: Roman Yeryomin <roman@advem.lv>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 47694
Diffstat (limited to 'target/linux/mediatek/patches/0005-clk-mediatek-Add-basic-clocks-for-Mediatek-MT8173.patch')
| -rw-r--r-- | target/linux/mediatek/patches/0005-clk-mediatek-Add-basic-clocks-for-Mediatek-MT8173.patch | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/target/linux/mediatek/patches/0005-clk-mediatek-Add-basic-clocks-for-Mediatek-MT8173.patch b/target/linux/mediatek/patches/0005-clk-mediatek-Add-basic-clocks-for-Mediatek-MT8173.patch index 9c0e2891a7..1e18660c72 100644 --- a/target/linux/mediatek/patches/0005-clk-mediatek-Add-basic-clocks-for-Mediatek-MT8173.patch +++ b/target/linux/mediatek/patches/0005-clk-mediatek-Add-basic-clocks-for-Mediatek-MT8173.patch @@ -19,8 +19,6 @@ Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> create mode 100644 include/dt-bindings/clock/mt8173-clk.h create mode 100644 include/dt-bindings/reset-controller/mt8173-resets.h -diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile -index 12ce576..8e4b2a4 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediatek/Makefile @@ -1,3 +1,4 @@ @@ -28,9 +26,6 @@ index 12ce576..8e4b2a4 100644 obj-$(CONFIG_RESET_CONTROLLER) += reset.o obj-y += clk-mt8135.o +obj-y += clk-mt8173.o -diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c -new file mode 100644 -index 0000000..357b080 --- /dev/null +++ b/drivers/clk/mediatek/clk-mt8173.c @@ -0,0 +1,830 @@ @@ -864,9 +859,6 @@ index 0000000..357b080 +} +CLK_OF_DECLARE(mtk_apmixedsys, "mediatek,mt8173-apmixedsys", + mtk_apmixedsys_init); -diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h -new file mode 100644 -index 0000000..4ad76ed --- /dev/null +++ b/include/dt-bindings/clock/mt8173-clk.h @@ -0,0 +1,235 @@ @@ -1105,9 +1097,6 @@ index 0000000..4ad76ed +#define CLK_PERI_NR_CLK 40 + +#endif /* _DT_BINDINGS_CLK_MT8173_H */ -diff --git a/include/dt-bindings/reset-controller/mt8173-resets.h b/include/dt-bindings/reset-controller/mt8173-resets.h -new file mode 100644 -index 0000000..9464b37 --- /dev/null +++ b/include/dt-bindings/reset-controller/mt8173-resets.h @@ -0,0 +1,63 @@ @@ -1174,6 +1163,3 @@ index 0000000..9464b37 +#define MT8173_PERI_SPI0_SW_RST 33 + +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8173 */ --- -1.7.10.4 - |