diff options
author | John Audia <graysky@archlinux.us> | 2020-07-16 07:03:17 -0400 |
---|---|---|
committer | Petr Štetiar <ynezz@true.cz> | 2020-07-17 11:00:33 +0200 |
commit | b6443367d8bca111a64f4c111a872fd100cc7d90 (patch) | |
tree | eb1b9ae308c2ed3149f3c76de40e331b4f0774b9 /target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch | |
parent | 2a43ab4a18b4dfe2f4e39b28b87c60b01e6dfd5c (diff) | |
download | upstream-b6443367d8bca111a64f4c111a872fd100cc7d90.tar.gz upstream-b6443367d8bca111a64f4c111a872fd100cc7d90.tar.bz2 upstream-b6443367d8bca111a64f4c111a872fd100cc7d90.zip |
kernel: bump 5.4 to 5.4.52
update_kernel.sh refreshed all patches, no human interaction was needed
Build system: x86_64
Run-tested: Netgear R7800 (ipq806x)
Signed-off-by: John Audia <graysky@archlinux.us>
Diffstat (limited to 'target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch')
-rw-r--r--[-rwxr-xr-x] | target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch b/target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch index e773e2e676..3e4d44f59e 100755..100644 --- a/target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch +++ b/target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch @@ -132,8 +132,6 @@ Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com> drivers/pci/controller/pcie-mediatek.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) -diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c -index cb982891b22b..2268d6073eb6 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -14,6 +14,7 @@ @@ -167,8 +165,8 @@ index cb982891b22b..2268d6073eb6 100644 + struct regmap *cfg; struct clk *free_ck; - struct list_head ports; -@@ -650,7 +654,7 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port, + struct resource mem; +@@ -651,7 +655,7 @@ static int mtk_pcie_setup_irq(struct mtk return err; } @@ -177,9 +175,9 @@ index cb982891b22b..2268d6073eb6 100644 irq_set_chained_handler_and_data(port->irq, mtk_pcie_intr_handler, port); -@@ -673,12 +677,11 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) - if (!mem) - return -EINVAL; +@@ -666,12 +670,11 @@ static int mtk_pcie_startup_port_v2(stru + u32 val; + int err; - /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */ - if (pcie->base) { @@ -195,7 +193,7 @@ index cb982891b22b..2268d6073eb6 100644 } /* Assert all reset signals */ -@@ -984,6 +987,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) +@@ -977,6 +980,7 @@ static int mtk_pcie_subsys_powerup(struc struct device *dev = pcie->dev; struct platform_device *pdev = to_platform_device(dev); struct resource *regs; @@ -203,7 +201,7 @@ index cb982891b22b..2268d6073eb6 100644 int err; /* get shared registers, which are optional */ -@@ -996,6 +1000,13 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) +@@ -989,6 +993,13 @@ static int mtk_pcie_subsys_powerup(struc } } |