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| author | Petr Štetiar <ynezz@true.cz> | 2020-06-09 14:18:25 +0200 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2020-06-09 16:59:33 +0200 |
| commit | e5aa498acb847320a382034ba0b9cfc55e6f13ca (patch) | |
| tree | fac56950bd2af2c34cd8705b55040ebd0f5042a9 /target/linux/mediatek/patches-5.4/0501-crypto-add-eip97-inside-secure-support.patch | |
| parent | df6a33a8d4115fcb7edd048f7dbfea054e9477b4 (diff) | |
| download | upstream-e5aa498acb847320a382034ba0b9cfc55e6f13ca.tar.gz upstream-e5aa498acb847320a382034ba0b9cfc55e6f13ca.tar.bz2 upstream-e5aa498acb847320a382034ba0b9cfc55e6f13ca.zip | |
kernel: bump 5.4 to 5.4.45
Fixes CVE-2020-10757 via upstream commit df4988aa1c96 ("mm: Fix mremap
not considering huge pmd devmap").
Resolved merge conflict in the following patches:
bcm27xx: 950-0128-gpiolib-Don-t-prevent-IRQ-usage-of-output-GPIOs.patch
Refreshed patches, removed upstreamed patch:
generic: 751-v5.8-net-dsa-mt7530-set-CPU-port-to-fallback-mode.patch
generic: 754-v5.7-net-dsa-mt7530-fix-roaming-from-DSA-user-ports.patch
Run tested: qemu-x86-64
Build tested: x86/64, imx6, sunxi/a53
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Diffstat (limited to 'target/linux/mediatek/patches-5.4/0501-crypto-add-eip97-inside-secure-support.patch')
| -rw-r--r-- | target/linux/mediatek/patches-5.4/0501-crypto-add-eip97-inside-secure-support.patch | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/mediatek/patches-5.4/0501-crypto-add-eip97-inside-secure-support.patch b/target/linux/mediatek/patches-5.4/0501-crypto-add-eip97-inside-secure-support.patch index 197cbf457d..98cb0b16ff 100644 --- a/target/linux/mediatek/patches-5.4/0501-crypto-add-eip97-inside-secure-support.patch +++ b/target/linux/mediatek/patches-5.4/0501-crypto-add-eip97-inside-secure-support.patch @@ -1,6 +1,6 @@ --- a/drivers/crypto/inside-secure/safexcel.c +++ b/drivers/crypto/inside-secure/safexcel.c -@@ -595,6 +595,14 @@ +@@ -595,6 +595,14 @@ static int safexcel_hw_init(struct safex val |= EIP197_MST_CTRL_TX_MAX_CMD(5); writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL); } |