diff options
author | John Crispin <john@phrozen.org> | 2020-04-03 11:52:35 +0200 |
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committer | John Crispin <john@phrozen.org> | 2020-04-06 07:07:42 +0200 |
commit | e2ceb8dd93ace2e82fe136e1900b6830ac11049d (patch) | |
tree | a708d9409b3c6baad5a62a0f0cc40045cd39d37b /target/linux/mediatek/patches-5.4/0400-eth-fix-rx-vlan-hw-offload.patch | |
parent | beb9820ed3647c7bcd6a6082149305abfd53c389 (diff) | |
download | upstream-e2ceb8dd93ace2e82fe136e1900b6830ac11049d.tar.gz upstream-e2ceb8dd93ace2e82fe136e1900b6830ac11049d.tar.bz2 upstream-e2ceb8dd93ace2e82fe136e1900b6830ac11049d.zip |
mediatek: more v5.4 fixes
These are all backports and/or on their way upstream.
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/mediatek/patches-5.4/0400-eth-fix-rx-vlan-hw-offload.patch')
-rw-r--r-- | target/linux/mediatek/patches-5.4/0400-eth-fix-rx-vlan-hw-offload.patch | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-5.4/0400-eth-fix-rx-vlan-hw-offload.patch b/target/linux/mediatek/patches-5.4/0400-eth-fix-rx-vlan-hw-offload.patch new file mode 100644 index 0000000000..f04b07fa53 --- /dev/null +++ b/target/linux/mediatek/patches-5.4/0400-eth-fix-rx-vlan-hw-offload.patch @@ -0,0 +1,23 @@ +diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-03-31 16:05:24.398403054 +0800 ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-03-31 16:05:39.142008780 +0800 +@@ -1284,7 +1284,7 @@ + skb->protocol = eth_type_trans(skb, netdev); + + if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX && +- RX_DMA_VID(trxd.rxd3)) ++ (trxd.rxd2 & RX_DMA_VTAG)) + __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), + RX_DMA_VID(trxd.rxd3)); + skb_record_rx_queue(skb, 0); +diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-03-31 16:05:29.726260583 +0800 ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-03-31 16:05:43.493892389 +0800 +@@ -293,6 +293,7 @@ + #define RX_DMA_LSO BIT(30) + #define RX_DMA_PLEN0(_x) (((_x) & 0x3fff) << 16) + #define RX_DMA_GET_PLEN0(_x) (((_x) >> 16) & 0x3fff) ++#define RX_DMA_VTAG BIT(15) + + /* QDMA descriptor rxd3 */ + #define RX_DMA_VID(_x) ((_x) & 0xfff) |