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authorChuanhong Guo <gch981213@gmail.com>2022-04-07 10:16:47 +0800
committerChuanhong Guo <gch981213@gmail.com>2022-04-28 18:06:00 +0800
commit68d5efaa10cf0689521fe05e386e3a1e11d8cb29 (patch)
treec6492319fa9cb6ef1694431c948b907be6fe2735 /target/linux/mediatek/patches-5.15/130-dts-mt7629-add-snand-support.patch
parent2138956bdc3145fac26d2ba8ac966f31d33cd290 (diff)
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mediatek: add an upstreamed spi-nand driver
This patch implements the spi-nand controller driver as an ECC-capable spi-mem controller to use the upstream SPI-NAND driver. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target/linux/mediatek/patches-5.15/130-dts-mt7629-add-snand-support.patch')
-rw-r--r--target/linux/mediatek/patches-5.15/130-dts-mt7629-add-snand-support.patch83
1 files changed, 50 insertions, 33 deletions
diff --git a/target/linux/mediatek/patches-5.15/130-dts-mt7629-add-snand-support.patch b/target/linux/mediatek/patches-5.15/130-dts-mt7629-add-snand-support.patch
index e7c5d9b167..be0018a383 100644
--- a/target/linux/mediatek/patches-5.15/130-dts-mt7629-add-snand-support.patch
+++ b/target/linux/mediatek/patches-5.15/130-dts-mt7629-add-snand-support.patch
@@ -11,63 +11,80 @@ Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
--- a/arch/arm/boot/dts/mt7629.dtsi
+++ b/arch/arm/boot/dts/mt7629.dtsi
-@@ -272,6 +272,22 @@
+@@ -272,6 +272,27 @@
status = "disabled";
};
-+ snand: snfi@1100d000 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&serial_nand_pins>;
++ snfi: spi@1100d000 {
+ compatible = "mediatek,mt7629-snand";
-+ reg = <0x1100d000 0x1000>, <0x1100e000 0x1000>;
-+ reg-names = "nfi", "ecc";
++ reg = <0x1100d000 0x1000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
-+ clocks = <&pericfg CLK_PERI_NFI_PD>,
-+ <&pericfg CLK_PERI_SNFI_PD>,
-+ <&pericfg CLK_PERI_NFIECC_PD>;
-+ clock-names = "nfi_clk", "pad_clk", "ecc_clk";
++ clocks = <&pericfg CLK_PERI_NFI_PD>, <&pericfg CLK_PERI_SNFI_PD>;
++ clock-names = "nfi_clk", "pad_clk";
++ nand-ecc-engine = <&bch>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
++ bch: ecc@1100e000 {
++ compatible = "mediatek,mt7622-ecc";
++ reg = <0x1100e000 0x1000>;
++ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>;
++ clocks = <&pericfg CLK_PERI_NFIECC_PD>;
++ clock-names = "nfiecc_clk";
++ status = "disabled";
++ };
++
spi: spi@1100a000 {
compatible = "mediatek,mt7629-spi",
"mediatek,mt7622-spi";
--- a/arch/arm/boot/dts/mt7629-rfb.dts
+++ b/arch/arm/boot/dts/mt7629-rfb.dts
-@@ -254,6 +254,38 @@
+@@ -254,6 +254,50 @@
};
};
-+&snand {
++&bch {
++ status = "okay";
++};
++
++&snfi {
++ pinctrl-names = "default";
++ pinctrl-0 = <&serial_nand_pins>;
+ status = "okay";
-+ mediatek,quad-spi;
++ flash@0 {
++ compatible = "spi-nand";
++ reg = <0>;
++ spi-tx-bus-width = <4>;
++ spi-rx-bus-width = <4>;
++ nand-ecc-engine = <&snfi>;
+
-+ partitions {
-+ compatible = "fixed-partitions";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
++ partitions {
++ compatible = "fixed-partitions";
++ #address-cells = <1>;
++ #size-cells = <1>;
+
-+ partition@0 {
-+ label = "Bootloader";
-+ reg = <0x00000 0x0100000>;
-+ read-only;
-+ };
++ partition@0 {
++ label = "Bootloader";
++ reg = <0x00000 0x0100000>;
++ read-only;
++ };
+
-+ partition@100000 {
-+ label = "Config";
-+ reg = <0x100000 0x0040000>;
-+ };
++ partition@100000 {
++ label = "Config";
++ reg = <0x100000 0x0040000>;
++ };
+
-+ partition@140000 {
-+ label = "factory";
-+ reg = <0x140000 0x0080000>;
-+ };
++ partition@140000 {
++ label = "factory";
++ reg = <0x140000 0x0080000>;
++ };
+
-+ partition@1c0000 {
-+ label = "firmware";
-+ reg = <0x1c0000 0x1000000>;
++ partition@1c0000 {
++ label = "firmware";
++ reg = <0x1c0000 0x1000000>;
++ };
+ };
+ };
+};