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author | Felix Fietkau <nbd@nbd.name> | 2020-10-24 21:15:20 +0200 |
---|---|---|
committer | Daniel Golle <daniel@makrotopia.org> | 2021-02-28 00:45:56 +0000 |
commit | c46ccb69d17e584479df849a107423175a143c83 (patch) | |
tree | 10c0b329ba571cbdd366e48e61173a64e56c841d /target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch | |
parent | 11425c9de29c8b9c5e4d7eec163a6afbb7fbdce2 (diff) | |
download | upstream-c46ccb69d17e584479df849a107423175a143c83.tar.gz upstream-c46ccb69d17e584479df849a107423175a143c83.tar.bz2 upstream-c46ccb69d17e584479df849a107423175a143c83.zip |
mediatek: mt7622: add Linux 5.10 support
Switch mt7622 subtarget to Linux 5.10, it has been tested by many of us
on several devices for a couple of weeks already.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch')
-rw-r--r-- | target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch b/target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch new file mode 100644 index 0000000000..be2bffb749 --- /dev/null +++ b/target/linux/mediatek/patches-5.10/401-crypto-fix-eip97-cache-incoherent.patch @@ -0,0 +1,26 @@ +--- a/drivers/crypto/inside-secure/safexcel.h ++++ b/drivers/crypto/inside-secure/safexcel.h +@@ -736,6 +736,9 @@ enum safexcel_eip_version { + /* Priority we use for advertising our algorithms */ + #define SAFEXCEL_CRA_PRIORITY 300 + ++/* System cache line size */ ++#define SYSTEM_CACHELINE_SIZE 64 ++ + /* SM3 digest result for zero length message */ + #define EIP197_SM3_ZEROM_HASH "\x1A\xB2\x1D\x83\x55\xCF\xA1\x7F" \ + "\x8E\x61\x19\x48\x31\xE8\x1A\x8F" \ +--- a/drivers/crypto/inside-secure/safexcel_hash.c ++++ b/drivers/crypto/inside-secure/safexcel_hash.c +@@ -53,9 +53,9 @@ struct safexcel_ahash_req { + u8 block_sz; /* block size, only set once */ + u8 digest_sz; /* output digest size, only set once */ + __le32 state[SHA3_512_BLOCK_SIZE / +- sizeof(__le32)] __aligned(sizeof(__le32)); ++ sizeof(__le32)] __aligned(SYSTEM_CACHELINE_SIZE); + +- u64 len; ++ u64 len __aligned(SYSTEM_CACHELINE_SIZE); + u64 processed; + + u8 cache[HASH_CACHE_SIZE] __aligned(sizeof(u32)); |