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authorJohn Crispin <john@phrozen.org>2018-01-08 15:06:24 +0100
committerJohn Crispin <john@phrozen.org>2018-02-14 11:27:50 +0100
commit7762c07c88980cff85ec20c12f18cd172260e9d9 (patch)
treed5e9e1f28c1aa9b47eadcf6b8d063b394a34ed17 /target/linux/mediatek/patches-4.9/0006-reset-mediatek-mt2701-reset-driver.patch
parent04d3308b6248ef21a6f0bc3378b342906c2d2865 (diff)
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mediatek: bump to v4.14
This drops support for all the !emmc EVB and adds banannaPi-R2 Also drop mtkhnat until the nftables offoad driver is ready Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/mediatek/patches-4.9/0006-reset-mediatek-mt2701-reset-driver.patch')
-rw-r--r--target/linux/mediatek/patches-4.9/0006-reset-mediatek-mt2701-reset-driver.patch36
1 files changed, 0 insertions, 36 deletions
diff --git a/target/linux/mediatek/patches-4.9/0006-reset-mediatek-mt2701-reset-driver.patch b/target/linux/mediatek/patches-4.9/0006-reset-mediatek-mt2701-reset-driver.patch
deleted file mode 100644
index 12bda9c6b1..0000000000
--- a/target/linux/mediatek/patches-4.9/0006-reset-mediatek-mt2701-reset-driver.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 596c3a7300c0419dba71d58cbd4136e0d1e12a4e Mon Sep 17 00:00:00 2001
-From: Shunli Wang <shunli.wang@mediatek.com>
-Date: Tue, 5 Jan 2016 14:30:22 +0800
-Subject: [PATCH 06/57] reset: mediatek: mt2701 reset driver
-
-In infrasys and perifsys, there are many reset
-control bits for kinds of modules. These bits are
-used as actual reset controllers to be registered
-into kernel's generic reset controller framework.
-
-Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
-Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
----
- drivers/clk/mediatek/clk-mt2701.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/clk/mediatek/clk-mt2701.c
-+++ b/drivers/clk/mediatek/clk-mt2701.c
-@@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(str
- if (r)
- pr_err("%s(): could not register clock provider: %d\n",
- __func__, r);
-+
-+ mtk_register_reset_controller(node, 2, 0x30);
- }
- CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init);
-
-@@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(stru
- if (r)
- pr_err("%s(): could not register clock provider: %d\n",
- __func__, r);
-+
-+ mtk_register_reset_controller(node, 2, 0x0);
- }
- CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init);
-