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author | John Crispin <john@phrozen.org> | 2018-05-07 12:07:32 +0200 |
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committer | John Crispin <john@phrozen.org> | 2018-05-24 22:11:55 +0200 |
commit | 050da2107a7eb2a571a8a3d0cee21cc6a44b72b8 (patch) | |
tree | 147c3b85ccae12e4b1659acd86ac93b13ecfa15d /target/linux/mediatek/patches-4.14/0221-arm64-dts-mt7622-add-usb-device-nodes.patch | |
parent | 4f67c1522d92bc4512c3ecf58c38ff9886530b48 (diff) | |
download | upstream-050da2107a7eb2a571a8a3d0cee21cc6a44b72b8.tar.gz upstream-050da2107a7eb2a571a8a3d0cee21cc6a44b72b8.tar.bz2 upstream-050da2107a7eb2a571a8a3d0cee21cc6a44b72b8.zip |
mediatek: backport upstream mediatek patches
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/mediatek/patches-4.14/0221-arm64-dts-mt7622-add-usb-device-nodes.patch')
-rw-r--r-- | target/linux/mediatek/patches-4.14/0221-arm64-dts-mt7622-add-usb-device-nodes.patch | 126 |
1 files changed, 126 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.14/0221-arm64-dts-mt7622-add-usb-device-nodes.patch b/target/linux/mediatek/patches-4.14/0221-arm64-dts-mt7622-add-usb-device-nodes.patch new file mode 100644 index 0000000000..9258093cb2 --- /dev/null +++ b/target/linux/mediatek/patches-4.14/0221-arm64-dts-mt7622-add-usb-device-nodes.patch @@ -0,0 +1,126 @@ +From 3e23988f5c9c5d54732eda1e8017409ef223048b Mon Sep 17 00:00:00 2001 +From: Chunfeng Yun <chunfeng.yun@mediatek.com> +Date: Fri, 12 Jan 2018 12:28:31 +0800 +Subject: [PATCH 221/224] arm64: dts: mt7622: add usb device nodes + +add xhci node and usb3 phy nodes + +Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> +Signed-off-by: Sean Wang <sean.wang@mediatek.com> +Tested-by: Jumin Li <jumin.li@mediatek.com> +--- + arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 28 +++++++++++++++ + arch/arm64/boot/dts/mediatek/mt7622.dtsi | 51 ++++++++++++++++++++++++++++ + 2 files changed, 79 insertions(+) + +diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +index 6715ffa5c15e..cc89e2e3c597 100644 +--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts ++++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +@@ -52,6 +52,24 @@ + memory { + reg = <0 0x40000000 0 0x3F000000>; + }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ reg_5v: regulator-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; + }; + + &pcie { +@@ -343,6 +361,16 @@ + status = "okay"; + }; + ++&ssusb { ++ vusb33-supply = <®_3p3v>; ++ vbus-supply = <®_5v>; ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; +diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi +index 881bc17f8f0d..bad1e997359a 100644 +--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi +@@ -535,6 +535,57 @@ + #reset-cells = <1>; + }; + ++ ssusb: usb@1a0c0000 { ++ compatible = "mediatek,mt7622-xhci", ++ "mediatek,mtk-xhci"; ++ reg = <0 0x1a0c0000 0 0x01000>, ++ <0 0x1a0c4700 0 0x0100>; ++ reg-names = "mac", "ippc"; ++ interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>; ++ power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF1>; ++ clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, ++ <&ssusbsys CLK_SSUSB_REF_EN>, ++ <&ssusbsys CLK_SSUSB_MCU_EN>, ++ <&ssusbsys CLK_SSUSB_DMA_EN>; ++ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; ++ phys = <&u2port0 PHY_TYPE_USB2>, ++ <&u3port0 PHY_TYPE_USB3>, ++ <&u2port1 PHY_TYPE_USB2>; ++ ++ status = "disabled"; ++ }; ++ ++ u3phy: usb-phy@1a0c4000 { ++ compatible = "mediatek,mt7622-u3phy", ++ "mediatek,generic-tphy-v1"; ++ reg = <0 0x1a0c4000 0 0x700>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ status = "disabled"; ++ ++ u2port0: usb-phy@1a0c4800 { ++ reg = <0 0x1a0c4800 0 0x0100>; ++ #phy-cells = <1>; ++ clocks = <&ssusbsys CLK_SSUSB_U2_PHY_EN>; ++ clock-names = "ref"; ++ }; ++ ++ u3port0: usb-phy@1a0c4900 { ++ reg = <0 0x1a0c4900 0 0x0700>; ++ #phy-cells = <1>; ++ clocks = <&clk25m>; ++ clock-names = "ref"; ++ }; ++ ++ u2port1: usb-phy@1a0c5000 { ++ reg = <0 0x1a0c5000 0 0x0100>; ++ #phy-cells = <1>; ++ clocks = <&ssusbsys CLK_SSUSB_U2_PHY_1P_EN>; ++ clock-names = "ref"; ++ }; ++ }; ++ + pciesys: pciesys@1a100800 { + compatible = "mediatek,mt7622-pciesys", + "syscon"; +-- +2.11.0 + |