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author | John Crispin <john@phrozen.org> | 2020-04-03 11:54:12 +0200 |
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committer | John Crispin <john@phrozen.org> | 2020-04-06 07:07:42 +0200 |
commit | 08df22e2abf053e2d5ddef6393fe26b277fa7d18 (patch) | |
tree | eaee171fe4eff4bf025215456ce0522552a43ca7 /target/linux/mediatek/patches-4.14/0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch | |
parent | e2ceb8dd93ace2e82fe136e1900b6830ac11049d (diff) | |
download | upstream-08df22e2abf053e2d5ddef6393fe26b277fa7d18.tar.gz upstream-08df22e2abf053e2d5ddef6393fe26b277fa7d18.tar.bz2 upstream-08df22e2abf053e2d5ddef6393fe26b277fa7d18.zip |
mediatek: drop v4.14 support
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/mediatek/patches-4.14/0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch')
-rw-r--r-- | target/linux/mediatek/patches-4.14/0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch | 45 |
1 files changed, 0 insertions, 45 deletions
diff --git a/target/linux/mediatek/patches-4.14/0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch b/target/linux/mediatek/patches-4.14/0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch deleted file mode 100644 index 39e0a2f00c..0000000000 --- a/target/linux/mediatek/patches-4.14/0215-arm64-dts-mt7622-turn-uart0-clock-to-real-ones.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 84b3092b3773777de1ba1ad142e53247fb881ddd Mon Sep 17 00:00:00 2001 -From: Sean Wang <sean.wang@mediatek.com> -Date: Thu, 28 Dec 2017 18:00:11 +0800 -Subject: [PATCH 215/224] arm64: dts: mt7622: turn uart0 clock to real ones - -This patch also cleans up two oscillators that provide clocks for MT7623. -Switch the uart clocks to the real ones while at it. - -Signed-off-by: Sean Wang <sean.wang@mediatek.com> -Cc: Matthias Brugger <matthias.bgg@gmail.com> ---- - arch/arm64/boot/dts/mediatek/mt7622.dtsi | 15 ++------------- - 1 file changed, 2 insertions(+), 13 deletions(-) - ---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -91,18 +91,6 @@ - }; - }; - -- uart_clk: dummy25m { -- compatible = "fixed-clock"; -- #clock-cells = <0>; -- clock-frequency = <25000000>; -- }; -- -- bus_clk: dummy280m { -- compatible = "fixed-clock"; -- #clock-cells = <0>; -- clock-frequency = <280000000>; -- }; -- - pwrap_clk: dummy40m { - compatible = "fixed-clock"; - clock-frequency = <40000000>; -@@ -234,7 +222,8 @@ - "mediatek,mt6577-uart"; - reg = <0 0x11002000 0 0x400>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>; -- clocks = <&uart_clk>, <&bus_clk>; -+ clocks = <&topckgen CLK_TOP_UART_SEL>, -+ <&pericfg CLK_PERI_UART1_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - }; |