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authorWeijie Gao <hackpascal@gmail.com>2018-06-13 21:41:59 +0800
committerJohn Crispin <john@phrozen.org>2018-06-18 18:21:19 +0200
commit52109ce71f3d864775fda04284d02425b96378d8 (patch)
tree3534480bc22a50dcea621770d2b22b59e368f352 /target/linux/mediatek/patches-4.14/0174-dt-bindings-net-mediatek-add-condition-to-property-m.patch
parent97c5cbc496e9cf8139994cd3ea987f4e9c70adbe (diff)
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ath79: ag71xx: fix pll-data setting for ar7242/ar934x/qca955x/qca956x
ar71xx/ar913x series use the old pll registers and settings. However started from ar7242, a new pll register is introduced and the pll setting is much simpler. This can be observed from dev-eth.c from the ar71xx target. Signed-off-by: Weijie Gao <hackpascal@gmail.com>
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