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author | Florian Fainelli <florian@openwrt.org> | 2012-06-23 11:03:50 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2012-06-23 11:03:50 +0000 |
commit | 81e8757da4e545a29178a077b257427418aaea2d (patch) | |
tree | 02ccf61a396a5c365229d1ef30913796dfed637d /target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/mcs814x.h | |
parent | 98b2bc9189a011cd4379c2005e23dc84c4e2f60f (diff) | |
download | upstream-81e8757da4e545a29178a077b257427418aaea2d.tar.gz upstream-81e8757da4e545a29178a077b257427418aaea2d.tar.bz2 upstream-81e8757da4e545a29178a077b257427418aaea2d.zip |
provide an early ioremap cookie of the system configuration register
SVN-Revision: 32489
Diffstat (limited to 'target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/mcs814x.h')
-rw-r--r-- | target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/mcs814x.h | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/mcs814x.h b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/mcs814x.h index 9dd09d0a44..2851ba49d6 100644 --- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/mcs814x.h +++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/mcs814x.h @@ -20,15 +20,13 @@ #define MCS814X_IRQ_MASK 0x20 #define MCS814X_IRQ_STS0 0x40 -#define _PHYS_CONFADDR 0x40000000 -#define _VIRT_CONFADDR MCS814X_IO_BASE +#define MCS814X_PHYS_BASE 0x40000000 +#define MCS814X_VIRT_BASE MCS814X_IO_BASE -#define _CONFOFFSET_UART 0x000DC000 -#define _CONFOFFSET_DBGLED 0x000EC000 -#define _CONFOFFSET_SYSDBG 0x000F8000 - -#define _CONFADDR_DBGLED (_VIRT_CONFADDR + _CONFOFFSET_DBGLED) -#define _CONFADDR_SYSDBG (_VIRT_CONFADDR + _CONFOFFSET_SYSDBG) +#define MCS814X_UART 0x000DC000 +#define MCS814X_DBGLED 0x000EC000 +#define MCS814X_SYSDBG 0x000F8000 +#define MCS814X_SYSDBG_SIZE 0x50 /* System configuration and bootstrap registers */ #define SYSDBG_BS1 0x00 @@ -46,6 +44,7 @@ #define SYSDBG_SYSCTL 0x08 #define SYSCTL_EMAC (1 << 0) +#define SYSCTL_EPHY (1 << 1) /* active low */ #define SYSCTL_CIPHER (1 << 16) #define SYSDBG_PLL_CTL 0x3C |