diff options
author | Florian Fainelli <florian@openwrt.org> | 2012-06-19 14:48:56 +0000 |
---|---|---|
committer | Florian Fainelli <florian@openwrt.org> | 2012-06-19 14:48:56 +0000 |
commit | fea5404e8a8b3d0190c8386f190b723477acebd4 (patch) | |
tree | 7b34e2be994fc0c2bdd15a6868864b39be34d6bc /target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/irqs.h | |
parent | 208fa63215795719b6875e7f5bc2090400c5ea1e (diff) | |
download | upstream-fea5404e8a8b3d0190c8386f190b723477acebd4.tar.gz upstream-fea5404e8a8b3d0190c8386f190b723477acebd4.tar.bz2 upstream-fea5404e8a8b3d0190c8386f190b723477acebd4.zip |
[mcs814x] add Moschip MSC814x support
This target currently only supports Moschip's MCS8140 SoC, but support
for other chips in the same family (MCS8142, MCS8144) will be easy to add.
Target support is entirely using Device Tree for probing peripherals.
Drivers support include:
- PCI
- USB 1 & 2
- watchdog
- random number generator
- UART
- timer
- internal Ethernet PHY
- Ethernet MAC core
Support for the following boards is included using Device Tree
- Devolo dLAN USB Extender
- Tigal RBT-832
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32462 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/irqs.h')
-rw-r--r-- | target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/irqs.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/irqs.h b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/irqs.h new file mode 100644 index 0000000000..78021d132d --- /dev/null +++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/irqs.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2003 Artec Design Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + +#define FIQ_START 0 + +#define NR_IRQS 32 + +#define IRQ_PCI_INTA 22 +#define IRQ_PCI_INTB 23 +#define IRQ_PCI_INTC 24 +#define IRQ_PCI_INTD 26 + +#endif |