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| author | Felix Fietkau <nbd@openwrt.org> | 2015-04-20 15:00:20 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2015-04-20 15:00:20 +0000 |
| commit | 5c6925a23b84430782ab84eac75ade065c6adbb3 (patch) | |
| tree | 345d0467c4fe510e76e8d902cf77a187e3c7d856 /target/linux/malta/be64 | |
| parent | e2e2fb168b33c24e61e01e7a2697c035a94ca7b9 (diff) | |
| download | upstream-5c6925a23b84430782ab84eac75ade065c6adbb3.tar.gz upstream-5c6925a23b84430782ab84eac75ade065c6adbb3.tar.bz2 upstream-5c6925a23b84430782ab84eac75ade065c6adbb3.zip | |
ar71xx: Remove TX/RX delay from pll_1000 for OM5P-AN
The tx/rx delay bits in the ETH_XMII_CONTROL register have to be unset when the
enable_rgmii_rx_delay/enable_rgmii_tx_delay will be set in the AT803x PHY.
Othwise the throughput in gigabit mode is heavily reduced.
Signed-off-by: Sven Eckelmann <sven@open-mesh.org>
SVN-Revision: 45521
Diffstat (limited to 'target/linux/malta/be64')
0 files changed, 0 insertions, 0 deletions