nuke the magicbox target and incorporate a rewritten port into ppc40x - note: no CF driver for now

SVN-Revision: 13358

3 files changed, 0 insertions, 645 deletions

diff --git a/target/linux/magicbox/files/arch/ppc/platforms/4xx/magicbox.c b/target/linux/magicbox/files/arch/ppc/platforms/4xx/magicbox.c
deleted file mode 100644
index e6df7f6408..0000000000
--- a/target/linux/magicbox/files/arch/ppc/platforms/4xx/magicbox.c
+++ /dev/null
@@ -1,298 +0,0 @@
-/*
- * Support for IBM PPC 405EP-based MagicBox board 
- * Copyright (C) 2006  Karol Lewandowski
- *
- * Heavily based on bubinga.c
- *
- * Author: SAW (IBM), derived from walnut.c.
- *         Maintained by MontaVista Software <source@mvista.com>
- *
- * 2003 (c) MontaVista Softare Inc.  This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/threads.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/blkdev.h>
-#include <linux/pci.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
-
-#include <asm/system.h>
-#include <asm/pci-bridge.h>
-#include <asm/processor.h>
-#include <asm/machdep.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/kgdb.h>
-#include <asm/ocp.h>
-#include <asm/ibm_ocp_pci.h>
-
-#include <platforms/4xx/ibm405ep.h>
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-extern bd_t __res;
-
-/* Some IRQs unique to the board
- * Used by the generic 405 PCI setup functions in ppc4xx_pci.c
- */
-int __init
-ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
-	static char pci_irq_table[][4] =
-	    /*
-	     *      PCI IDSEL/INTPIN->INTLINE
-	     *      A       B       C       D
-	     */
-	{
-		{28, 28, 28, 28},	/* IDSEL 1 - PCI slot 1 */
-		{29, 29, 29, 29},	/* IDSEL 2 - PCI slot 2 */
-		{30, 30, 30, 30},	/* IDSEL 3 - PCI slot 3 */
-		{31, 31, 31, 31},	/* IDSEL 4 - PCI slot 4 */
-	};
-
-	const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
-	return PCI_IRQ_TABLE_LOOKUP;
-};
-
-/* The serial clock for the chip is an internal clock determined by
- * different clock speeds/dividers.
- * Calculate the proper input baud rate and setup the serial driver.
- */
-static void __init
-magicbox_early_serial_map(void)
-{
-	u32 uart_div;
-	int uart_clock;
-	struct uart_port port;
-
-         /* Calculate the serial clock input frequency
-          *
-          * The base baud is the PLL OUTA (provided in the board info
-          * structure) divided by the external UART Divisor, divided
-          * by 16.
-          */
-	uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);
-	uart_clock = __res.bi_procfreq / uart_div;
-
-	/* Setup serial port access */
-	memset(&port, 0, sizeof(port));
-	port.membase = (void*)ACTING_UART0_IO_BASE;
-	port.irq = ACTING_UART0_INT;
-	port.uartclk = uart_clock;
-	port.regshift = 0;
-	port.iotype = UPIO_MEM;
-	port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
-	port.line = 0;
-
-	if (early_serial_setup(&port) != 0) {
-		printk("Early serial init of port 0 failed\n");
-	}
-
-	port.membase = (void*)ACTING_UART1_IO_BASE;
-	port.irq = ACTING_UART1_INT;
-	port.line = 1;
-
-	if (early_serial_setup(&port) != 0) {
-		printk("Early serial init of port 1 failed\n");
-	}
-}
-
-void __init
-bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
-{
-#ifdef CONFIG_PCI
-
-	unsigned int bar_response, bar;
-	/*
-	 * Expected PCI mapping:
-	 *
-	 *  PLB addr             PCI memory addr
-	 *  ---------------------       ---------------------
-	 *  0000'0000 - 7fff'ffff <---  0000'0000 - 7fff'ffff
-	 *  8000'0000 - Bfff'ffff --->  8000'0000 - Bfff'ffff
-	 *
-	 *  PLB addr             PCI io addr
-	 *  ---------------------       ---------------------
-	 *  e800'0000 - e800'ffff --->  0000'0000 - 0001'0000
-	 *
-	 * The following code is simplified by assuming that the bootrom
-	 * has been well behaved in following this mapping.
-	 */
-
-#ifdef DEBUG
-	int i;
-
-	printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
-	printk("PCI bridge regs before fixup \n");
-	for (i = 0; i <= 3; i++) {
-		printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
-		printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
-		printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
-		printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
-	}
-	printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
-	printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
-	printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
-	printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
-
-#endif
-
-	/* added for IBM boot rom version 1.15 bios bar changes  -AK */
-
-	/* Disable region first */
-	out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
-	/* PLB starting addr, PCI: 0x80000000 */
-	out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
-	/* PCI start addr, 0x80000000 */
-	out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
-	/* 512MB range of PLB to PCI */
-	out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
-	/* Enable no pre-fetch, enable region */
-	out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
-						(PPC405_PCI_UPPER_MEM -
-						 PPC405_PCI_MEM_BASE)) | 0x01));
-
-	/* Disable region one */
-	out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
-	out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
-	out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
-	out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
-	out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
-	out_le32((void *) &(pcip->ptm1ms), 0x00000001);
-
-	/* Disable region two */
-	out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
-	out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
-	out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
-	out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
-	out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
-	out_le32((void *) &(pcip->ptm2ms), 0x00000000);
-	out_le32((void *) &(pcip->ptm2la), 0x00000000);
-
-	/* Zero config bars */
-	for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
-		early_write_config_dword(hose, hose->first_busno,
-					 PCI_FUNC(hose->first_busno), bar,
-					 0x00000000);
-		early_read_config_dword(hose, hose->first_busno,
-					PCI_FUNC(hose->first_busno), bar,
-					&bar_response);
-		DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
-		    hose->first_busno, PCI_SLOT(hose->first_busno),
-		    PCI_FUNC(hose->first_busno), bar, bar_response);
-	}
-	/* end workaround */
-
-#ifdef DEBUG
-	printk("PCI bridge regs after fixup \n");
-	for (i = 0; i <= 3; i++) {
-		printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
-		printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
-		printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
-		printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
-	}
-	printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
-	printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
-	printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
-	printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
-
-#endif
-#endif
-}
-
-static struct resource magicbox_flash_resource = {
-	.start = 0xffc00000,
-	.end   = 0xffffffffULL,
-	.flags = IORESOURCE_MEM,
-};
-
-static struct mtd_partition magicbox_flash_parts[] = {
-	{
-		.name = "linux",
-		.offset = 0x0,
-		.size = 0x3c0000,
-	},
-	{
-		.name = "rootfs",
-		.offset = 0x100000,
-		.size = 0x2c0000,
-	}
-};
-
-static struct physmap_flash_data magicbox_flash_data = {
-	.width		= 2,
-	.parts		= magicbox_flash_parts,
-	.nr_parts	= ARRAY_SIZE(magicbox_flash_parts),
-};
-
-static struct platform_device magicbox_flash_device = {
-	.name		= "physmap-flash",
-	.id		= 0,
-	.dev = {
-			.platform_data = &magicbox_flash_data,
-		},
-	.num_resources	= 1,
-	.resource	= &magicbox_flash_resource,
-};
-
-static int magicbox_setup_flash(void)
-{
-	platform_device_register(&magicbox_flash_device);
-
-	return 0;
-};
-
-arch_initcall (magicbox_setup_flash);
-
-void __init
-magicbox_setup_arch(void)
-{
-	ppc4xx_setup_arch();
-
-	ibm_ocp_set_emac(0, 1);
-
-	magicbox_early_serial_map();
-
-	/* Identify the system */
-	printk("MagicBox port (C) 2005 Karol Lewandowski <kl@jasmine.eu.org>\n");
-}
-
-void __init
-magicbox_map_io(void)
-{
-	ppc4xx_map_io();
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-	      unsigned long r6, unsigned long r7)
-{
-	ppc4xx_init(r3, r4, r5, r6, r7);
-
-	ppc_md.setup_arch = magicbox_setup_arch;
-	ppc_md.setup_io_mappings = magicbox_map_io;
-
-#ifdef CONFIG_KGDB
-	ppc_md.early_serial_map = bubinga_early_serial_map;
-#endif
-}
-
diff --git a/target/linux/magicbox/files/arch/ppc/platforms/4xx/magicbox.h b/target/linux/magicbox/files/arch/ppc/platforms/4xx/magicbox.h
deleted file mode 100644
index 50b8d411b2..0000000000
--- a/target/linux/magicbox/files/arch/ppc/platforms/4xx/magicbox.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Support for IBM PPC 405EP-based MagicBox board
- *
- * Heavily based on bubinga.h
- *
- *
- * Author: SAW (IBM), derived from walnut.h.
- *         Maintained by MontaVista Software <source@mvista.com>
- *
- * 2003 (c) MontaVista Softare Inc.  This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __MAGICBOX_H__
-#define __MAGICBOX_H__
-
-#include <platforms/4xx/ibm405ep.h>
-#include <asm/ppcboot.h>
-
-/* Memory map for the "MagicBox" 405EP evaluation board -- generic 4xx. */
-
-/* The UART clock is based off an internal clock -
- * define BASE_BAUD based on the internal clock and divider(s).
- * Since BASE_BAUD must be a constant, we will initialize it
- * using clock/divider values which OpenBIOS initializes
- * for typical configurations at various CPU speeds.
- * The base baud is calculated as (FWDA / EXT UART DIV / 16)
- */
-#define BASE_BAUD		0
-
-/* Flash */
-#define PPC40x_FPGA_BASE	0xF0300000
-#define PPC40x_FPGA_REG_OFFS	1	/* offset to flash map reg */
-#define PPC40x_FLASH_ONBD_N(x)	(x & 0x02)
-#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
-#define PPC40x_FLASH_LOW	0xFFF00000
-#define PPC40x_FLASH_HIGH	0xFFF80000
-#define PPC40x_FLASH_SIZE	0x80000
-
-#define PPC4xx_MACHINE_NAME	"MagicBox"
-
-#endif /* __MAGICBOX_H__ */
-#endif /* __KERNEL__ */
diff --git a/target/linux/magicbox/files/drivers/ide/ppc/magicbox_ide.c b/target/linux/magicbox/files/drivers/ide/ppc/magicbox_ide.c
deleted file mode 100644
index 0bc62f2dec..0000000000
--- a/target/linux/magicbox/files/drivers/ide/ppc/magicbox_ide.c
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
- * Driver for MagicBox 2.0 onboard CompactFlash adapter.
- *
- * Written by Wojtek Kaniewski <wojtekka@toxygen.net>
- * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
- *
- * GNU General Public License.
- */
-
-#include <linux/version.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/blkdev.h>
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-
-#define UIC0_PR		0xc4
-#define UIC0_TR		0xc5
-#define MAGICBOX_CF_IRQ	25
-
-static u8 magicbox_ide_inb(unsigned long port)
-{
-	return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
-}
-
-static void magicbox_ide_outb(u8 value, unsigned long port)
-{
-	writew(value << 8, (void __iomem *) port);
-}
-
-static void magicbox_ide_outbsync(ide_drive_t *drive, u8 value,
-				  unsigned long port)
-{
-	writew(value << 8, (void __iomem *) port);
-}
-
-static inline void magicbox_ide_insw(unsigned long port, void *addr, u32 count)
-{
-	u16 *ptr;
-
-	for (ptr = addr; count--; ptr++)
-		*ptr = readw((void __iomem *) port);
-}
-
-static inline void magicbox_ide_insl(unsigned long port, void *addr, u32 count)
-{
-	u32 *ptr;
-
-	for (ptr = addr; count--; ptr++)
-		*ptr = readl((void __iomem *) port);
-}
-
-static inline void magicbox_ide_outsw(unsigned long port, void *addr,
-					u32 count)
-{
-	u16 *ptr;
-
-	for (ptr = addr; count--; ptr++)
-		writew(*ptr, (void __iomem *) port);
-}
-
-static inline void magicbox_ide_outsl(unsigned long port, void *addr,
-					u32 count)
-{
-	u32 *ptr;
-
-	for (ptr = addr; count--; ptr++)
-		writel(*ptr, (void __iomem *) port);
-}
-
-static void magicbox_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
-{
-	struct ide_io_ports *io_ports = &drive->hwif->io_ports;
-	struct ide_taskfile *tf = &task->tf;
-	u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
-
-	if (task->tf_flags & IDE_TFLAG_FLAGGED)
-		HIHI = 0xFF;
-
-	ide_set_irq(drive, 1);
-
-	if (task->tf_flags & IDE_TFLAG_OUT_DATA)
-		writel((tf->hob_data << 8) | tf->data,
-			(void __iomem *) io_ports->data_addr);
-
-	if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
-		magicbox_ide_outb(tf->hob_feature, io_ports->feature_addr);
-	if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
-		magicbox_ide_outb(tf->hob_nsect, io_ports->nsect_addr);
-	if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
-		magicbox_ide_outb(tf->hob_lbal, io_ports->lbal_addr);
-	if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
-		magicbox_ide_outb(tf->hob_lbam, io_ports->lbam_addr);
-	if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
-		magicbox_ide_outb(tf->hob_lbah, io_ports->lbah_addr);
-
-	if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
-		magicbox_ide_outb(tf->feature, io_ports->feature_addr);
-	if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
-		magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
-	if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
-		magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
-	if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
-		magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
-	if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
-		magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
-
-	if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
-		magicbox_ide_outb((tf->device & HIHI) | drive->select.all,
-			     io_ports->device_addr);
-}
-
-static void magicbox_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
-{
-	struct ide_io_ports *io_ports = &drive->hwif->io_ports;
-	struct ide_taskfile *tf = &task->tf;
-
-	if (task->tf_flags & IDE_TFLAG_IN_DATA) {
-		u16 data = (u16) readl((void __iomem *) io_ports->data_addr);
-
-		tf->data = data & 0xff;
-		tf->hob_data = (data >> 8) & 0xff;
-	}
-
-	/* be sure we're looking at the low order bits */
-	magicbox_ide_outb(drive->ctl & ~0x80, io_ports->ctl_addr);
-
-	if (task->tf_flags & IDE_TFLAG_IN_NSECT)
-		tf->nsect  = magicbox_ide_inb(io_ports->nsect_addr);
-	if (task->tf_flags & IDE_TFLAG_IN_LBAL)
-		tf->lbal   = magicbox_ide_inb(io_ports->lbal_addr);
-	if (task->tf_flags & IDE_TFLAG_IN_LBAM)
-		tf->lbam   = magicbox_ide_inb(io_ports->lbam_addr);
-	if (task->tf_flags & IDE_TFLAG_IN_LBAH)
-		tf->lbah   = magicbox_ide_inb(io_ports->lbah_addr);
-	if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
-		tf->device = magicbox_ide_inb(io_ports->device_addr);
-
-	if (task->tf_flags & IDE_TFLAG_LBA48) {
-		magicbox_ide_outb(drive->ctl | 0x80, io_ports->ctl_addr);
-
-		if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
-			tf->hob_feature = magicbox_ide_inb(io_ports->feature_addr);
-		if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
-			tf->hob_nsect   = magicbox_ide_inb(io_ports->nsect_addr);
-		if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
-			tf->hob_lbal    = magicbox_ide_inb(io_ports->lbal_addr);
-		if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
-			tf->hob_lbam    = magicbox_ide_inb(io_ports->lbam_addr);
-		if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
-			tf->hob_lbah    = magicbox_ide_inb(io_ports->lbah_addr);
-	}
-}
-
-static void magicbox_ide_input_data(ide_drive_t *drive, struct request *rq,
-			   void *buf, unsigned int len)
-{
-	unsigned long port = drive->hwif->io_ports.data_addr;
-
-	len++;
-
-	if (drive->io_32bit) {
-		magicbox_ide_insl(port, buf, len / 4);
-
-		if ((len & 3) >= 2)
-			magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
-	} else
-		magicbox_ide_insw(port, buf, len / 2);
-}
-
-static void magicbox_ide_output_data(ide_drive_t *drive,  struct request *rq,
-			    void *buf, unsigned int len)
-{
-	unsigned long port = drive->hwif->io_ports.data_addr;
-
-	len++;
-
-	if (drive->io_32bit) {
-		magicbox_ide_outsl(port, buf, len / 4);
-
-		if ((len & 3) >= 2)
-			magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
-	} else
-		magicbox_ide_outsw(port, buf, len / 2);
-}
-
-static void __init magicbox_ide_setup_hw(hw_regs_t *hw, u16 __iomem *base,
-					u16 __iomem *ctrl, int irq)
-{
-	unsigned long port = (unsigned long) base;
-	int i;
-
-	memset(hw, 0, sizeof(*hw));
-	for (i = 0; i <= 7; i++)
-		hw->io_ports_array[i] = port + i * 2;
-
-	/*
-	 * the IDE control register is at ATA address 6,
-	 * with CS1 active instead of CS0
-	 */
-	hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
-
-	hw->irq = irq;
-
-	hw->chipset = ide_generic;
-	hw->ack_intr = NULL;
-}
-
-static int __init magibox_ide_probe(void)
-{
-	hw_regs_t hw;
-	ide_hwif_t *hwif;
-	u16 __iomem *base;
-	u16 __iomem *ctrl;
-	u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
-	int err;
-
-	/* Remap physical address space */
-	base = ioremap_nocache(0xff100000, 4096);
-	if (base == NULL) {
-		err = -EBUSY;
-		goto err_out;
-	}
-
-	ctrl = ioremap_nocache(0xff200000, 4096);
-	if (ctrl == NULL) {
-		err = -EBUSY;
-		goto err_unmap_base;
-	}
-
-	magicbox_ide_setup_hw(&hw, base, ctrl, MAGICBOX_CF_IRQ);
-
-	hwif = ide_find_port();
-	if (!hwif) {
-		err = -ENODEV;
-		goto err_unmap_ctrl;
-	}
-
-	ide_init_port_data(hwif, hwif->index);
-	ide_init_port_hw(hwif, &hw);
-
-	hwif->host_flags = IDE_HFLAG_MMIO;
-
-	hwif->tf_load = magicbox_ide_tf_load;
-	hwif->tf_read = magicbox_ide_tf_read;
-
-	hwif->input_data  = magicbox_ide_input_data;
-	hwif->output_data = magicbox_ide_output_data;
-
-	hwif->drives[0].unmask = 1;
-	hwif->OUTB = magicbox_ide_outb;
-	hwif->OUTBSYNC = magicbox_ide_outbsync;
-	hwif->INB = magicbox_ide_inb;
-
-	printk(KERN_INFO "ide%d: Magicbox CF interface\n", hwif->index);
-
-	idx[0] = hwif->index;
-
-	ide_device_add(idx, NULL);
-
-	return 0;
-
-err_unmap_ctrl:
-	iounmap(ctrl);
-err_unmap_base:
-	iounmap(base);
-err_out:
-	return err;
-}
-
-static int __init magicbox_ide_init(void)
-{
-	/* Turn on PerWE instead of PCIsomething */
-	mtdcr(DCRN_CPC0_PCI_BASE,
-			mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
-
-	/* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
-	mtdcr(DCRN_EBC_BASE, 1);
-	mtdcr(DCRN_EBC_BASE + 1, 0xff11a000);
-	mtdcr(DCRN_EBC_BASE, 0x11);
-	mtdcr(DCRN_EBC_BASE + 1, 0x080bd800);
-
-	/* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
-	mtdcr(DCRN_EBC_BASE, 2);
-	mtdcr(DCRN_EBC_BASE + 1, 0xff21a000);
-	mtdcr(DCRN_EBC_BASE, 0x12);
-	mtdcr(DCRN_EBC_BASE + 1, 0x080bd800);
-
-	/* Set interrupt to low-to-high-edge-triggered */
-	mtdcr(UIC0_TR, mfdcr(UIC0_TR) & ~(0x80000000L >> MAGICBOX_CF_IRQ));
-	mtdcr(UIC0_PR, mfdcr(UIC0_PR) | (0x80000000L >> MAGICBOX_CF_IRQ));
-
-	return magibox_ide_probe();
-}
-
-module_init(magicbox_ide_init);
-
-MODULE_LICENSE("GPL");