kernel: bump 4.9 to 4.9.101

Refreshed all patches

Compile-tested on: ar71xx
Runtime-tested on: ar71xx

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>

1 files changed, 12 insertions, 12 deletions

diff --git a/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch b/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch
index 9d84968608..e8fc1ec2ba 100644
--- a/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch
+++ b/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch
@@ -705,7 +705,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	case SPI_NOR_NORMAL:
  		return 0;
  	}
-@@ -961,6 +973,8 @@ static const struct flash_info spi_nor_i
+@@ -962,6 +974,8 @@ static const struct flash_info spi_nor_i
  
  	/* ESMT */
  	{ "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_HAS_LOCK) },
@@ -714,7 +714,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  	/* Everspin */
  	{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
-@@ -1014,12 +1028,15 @@ static const struct flash_info spi_nor_i
+@@ -1015,12 +1029,15 @@ static const struct flash_info spi_nor_i
  	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
  	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
  	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
@@ -731,7 +731,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
  	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },
  	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
-@@ -1033,10 +1050,11 @@ static const struct flash_info spi_nor_i
+@@ -1034,10 +1051,11 @@ static const struct flash_info spi_nor_i
  	{ "n25q128a11",  INFO(0x20bb18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
  	{ "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
  	{ "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
@@ -745,7 +745,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  	/* PMC */
  	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
-@@ -1054,8 +1072,11 @@ static const struct flash_info spi_nor_i
+@@ -1055,8 +1073,11 @@ static const struct flash_info spi_nor_i
  	{ "s70fl01gs",  INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
  	{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64, 0) },
  	{ "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256, 0) },
@@ -758,7 +758,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	{ "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
  	{ "s25sl004a",  INFO(0x010212,      0,  64 * 1024,   8, 0) },
  	{ "s25sl008a",  INFO(0x010213,      0,  64 * 1024,  16, 0) },
-@@ -1130,6 +1151,9 @@ static const struct flash_info spi_nor_i
+@@ -1131,6 +1152,9 @@ static const struct flash_info spi_nor_i
  	{ "w25x80", INFO(0xef3014, 0, 64 * 1024,  16, SECT_4K) },
  	{ "w25x16", INFO(0xef3015, 0, 64 * 1024,  32, SECT_4K) },
  	{ "w25x32", INFO(0xef3016, 0, 64 * 1024,  64, SECT_4K) },
@@ -768,7 +768,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	{ "w25q32", INFO(0xef4016, 0, 64 * 1024,  64, SECT_4K) },
  	{
  		"w25q32dw", INFO(0xef6016, 0, 64 * 1024,  64,
-@@ -1196,6 +1220,53 @@ static const struct flash_info *spi_nor_
+@@ -1197,6 +1221,53 @@ static const struct flash_info *spi_nor_
  		id[0], id[1], id[2]);
  	return ERR_PTR(-ENODEV);
  }
@@ -822,7 +822,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
  			size_t *retlen, u_char *buf)
-@@ -1415,7 +1486,7 @@ static int macronix_quad_enable(struct s
+@@ -1416,7 +1487,7 @@ static int macronix_quad_enable(struct s
   * Write status Register and configuration register with 2 bytes
   * The first byte will be written to the status register, while the
   * second byte will be written to the configuration register.
@@ -831,7 +831,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
   */
  static int write_sr_cr(struct spi_nor *nor, u16 val)
  {
-@@ -1463,6 +1534,24 @@ static int spansion_quad_enable(struct s
+@@ -1464,6 +1535,24 @@ static int spansion_quad_enable(struct s
  	return 0;
  }
  
@@ -856,7 +856,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  static int set_quad_mode(struct spi_nor *nor, const struct flash_info *info)
  {
  	int status;
-@@ -1609,9 +1698,25 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -1610,9 +1699,25 @@ int spi_nor_scan(struct spi_nor *nor, co
  		write_sr(nor, 0);
  		spi_nor_wait_till_ready(nor);
  	}
@@ -882,7 +882,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	mtd->priv = nor;
  	mtd->type = MTD_NORFLASH;
  	mtd->writesize = 1;
-@@ -1645,6 +1750,8 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -1646,6 +1751,8 @@ int spi_nor_scan(struct spi_nor *nor, co
  		nor->flags |= SNOR_F_USE_FSR;
  	if (info->flags & SPI_NOR_HAS_TB)
  		nor->flags |= SNOR_F_HAS_SR_TB;
@@ -891,7 +891,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
  	/* prefer "small sector" erase if possible */
-@@ -1684,9 +1791,15 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -1685,9 +1792,15 @@ int spi_nor_scan(struct spi_nor *nor, co
  	/* Some devices cannot do fast-read, no matter what DT tells us */
  	if (info->flags & SPI_NOR_NO_FR)
  		nor->flash_read = SPI_NOR_NORMAL;
@@ -910,7 +910,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  		ret = set_quad_mode(nor, info);
  		if (ret) {
  			dev_err(dev, "quad mode not supported\n");
-@@ -1699,6 +1812,9 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -1700,6 +1813,9 @@ int spi_nor_scan(struct spi_nor *nor, co
  
  	/* Default commands */
  	switch (nor->flash_read) {