kernel: bump 4.14 to 4.14.149

Refreshed all patches.

Altered patches:
- 820-sec-support-layerscape.patch

Compile-tested on: ar71xx, brcm2708, cns3xxx, imx6, layerscape, x86_64
Runtime-tested on: ar71xx, cns3xxx, imx6

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>

2 files changed, 46 insertions, 45 deletions

diff --git a/target/linux/layerscape/patches-4.14/819-sdhc-support-layerscape.patch b/target/linux/layerscape/patches-4.14/819-sdhc-support-layerscape.patch
index db1a18fc18..60d0c889e5 100644
--- a/target/linux/layerscape/patches-4.14/819-sdhc-support-layerscape.patch
+++ b/target/linux/layerscape/patches-4.14/819-sdhc-support-layerscape.patch
@@ -131,7 +131,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  };
  
  /**
-@@ -495,13 +545,20 @@ static void esdhc_clock_enable(struct sd
+@@ -500,13 +550,20 @@ static void esdhc_clock_enable(struct sd
  	}
  }
  
@@ -152,7 +152,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	u32 temp;
  
  	host->mmc->actual_clock = 0;
-@@ -515,27 +572,14 @@ static void esdhc_of_set_clock(struct sd
+@@ -520,27 +577,14 @@ static void esdhc_of_set_clock(struct sd
  	if (esdhc->vendor_ver < VENDOR_V_23)
  		pre_div = 2;
  
@@ -187,7 +187,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  
  	temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);
  	temp &= ~(ESDHC_CLOCK_SDCLKEN | ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN |
-@@ -548,9 +592,30 @@ static void esdhc_of_set_clock(struct sd
+@@ -553,9 +597,30 @@ static void esdhc_of_set_clock(struct sd
  	while (host->max_clk / pre_div / div > clock && div < 16)
  		div++;
  
@@ -218,7 +218,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	pre_div >>= 1;
  	div--;
  
-@@ -560,6 +625,29 @@ static void esdhc_of_set_clock(struct sd
+@@ -565,6 +630,29 @@ static void esdhc_of_set_clock(struct sd
  		| (pre_div << ESDHC_PREDIV_SHIFT));
  	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
  
@@ -248,7 +248,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	/* Wait max 20 ms */
  	timeout = ktime_add_ms(ktime_get(), 20);
  	while (1) {
-@@ -575,6 +663,7 @@ static void esdhc_of_set_clock(struct sd
+@@ -580,6 +668,7 @@ static void esdhc_of_set_clock(struct sd
  		udelay(10);
  	}
  
@@ -256,7 +256,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	temp |= ESDHC_CLOCK_SDCLKEN;
  	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
  }
-@@ -603,6 +692,8 @@ static void esdhc_pltfm_set_bus_width(st
+@@ -608,6 +697,8 @@ static void esdhc_pltfm_set_bus_width(st
  
  static void esdhc_reset(struct sdhci_host *host, u8 mask)
  {
@@ -265,7 +265,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	u32 val;
  
  	sdhci_reset(host, mask);
-@@ -617,6 +708,12 @@ static void esdhc_reset(struct sdhci_hos
+@@ -622,6 +713,12 @@ static void esdhc_reset(struct sdhci_hos
  		val = sdhci_readl(host, ESDHC_TBCTL);
  		val &= ~ESDHC_TB_EN;
  		sdhci_writel(host, val, ESDHC_TBCTL);
@@ -278,7 +278,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	}
  }
  
-@@ -628,6 +725,7 @@ static void esdhc_reset(struct sdhci_hos
+@@ -633,6 +730,7 @@ static void esdhc_reset(struct sdhci_hos
  static const struct of_device_id scfg_device_ids[] = {
  	{ .compatible = "fsl,t1040-scfg", },
  	{ .compatible = "fsl,ls1012a-scfg", },
@@ -286,7 +286,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	{ .compatible = "fsl,ls1046a-scfg", },
  	{}
  };
-@@ -690,23 +788,91 @@ static int esdhc_signal_voltage_switch(s
+@@ -695,23 +793,91 @@ static int esdhc_signal_voltage_switch(s
  	}
  }
  
@@ -383,7 +383,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  }
  
  #ifdef CONFIG_PM_SLEEP
-@@ -755,7 +921,7 @@ static const struct sdhci_ops sdhci_esdh
+@@ -760,7 +926,7 @@ static const struct sdhci_ops sdhci_esdh
  	.adma_workaround = esdhc_of_adma_workaround,
  	.set_bus_width = esdhc_pltfm_set_bus_width,
  	.reset = esdhc_reset,
@@ -392,7 +392,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  };
  
  static const struct sdhci_ops sdhci_esdhc_le_ops = {
-@@ -772,7 +938,7 @@ static const struct sdhci_ops sdhci_esdh
+@@ -777,7 +943,7 @@ static const struct sdhci_ops sdhci_esdh
  	.adma_workaround = esdhc_of_adma_workaround,
  	.set_bus_width = esdhc_pltfm_set_bus_width,
  	.reset = esdhc_reset,
@@ -401,7 +401,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  };
  
  static const struct sdhci_pltfm_data sdhci_esdhc_be_pdata = {
-@@ -798,8 +964,20 @@ static struct soc_device_attribute soc_i
+@@ -803,8 +969,20 @@ static struct soc_device_attribute soc_i
  	{ },
  };
  
@@ -422,7 +422,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	struct sdhci_pltfm_host *pltfm_host;
  	struct sdhci_esdhc *esdhc;
  	struct device_node *np;
-@@ -819,6 +997,24 @@ static void esdhc_init(struct platform_d
+@@ -824,6 +1002,24 @@ static void esdhc_init(struct platform_d
  	else
  		esdhc->quirk_incorrect_hostver = false;
  
@@ -447,7 +447,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	np = pdev->dev.of_node;
  	clk = of_clk_get(np, 0);
  	if (!IS_ERR(clk)) {
-@@ -846,6 +1042,12 @@ static void esdhc_init(struct platform_d
+@@ -851,6 +1047,12 @@ static void esdhc_init(struct platform_d
  	}
  }
  
@@ -460,7 +460,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  static int sdhci_esdhc_probe(struct platform_device *pdev)
  {
  	struct sdhci_host *host;
-@@ -869,6 +1071,7 @@ static int sdhci_esdhc_probe(struct plat
+@@ -874,6 +1076,7 @@ static int sdhci_esdhc_probe(struct plat
  	host->mmc_host_ops.start_signal_voltage_switch =
  		esdhc_signal_voltage_switch;
  	host->mmc_host_ops.execute_tuning = esdhc_execute_tuning;
@@ -468,7 +468,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	host->tuning_delay = 1;
  
  	esdhc_init(pdev, host);
-@@ -877,6 +1080,11 @@ static int sdhci_esdhc_probe(struct plat
+@@ -882,6 +1085,11 @@ static int sdhci_esdhc_probe(struct plat
  
  	pltfm_host = sdhci_priv(host);
  	esdhc = sdhci_pltfm_priv(pltfm_host);
@@ -480,7 +480,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
  	if (esdhc->vendor_ver == VENDOR_V_22)
  		host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
  
-@@ -923,14 +1131,6 @@ static int sdhci_esdhc_probe(struct plat
+@@ -928,14 +1136,6 @@ static int sdhci_esdhc_probe(struct plat
  	return ret;
  }
  
diff --git a/target/linux/layerscape/patches-4.14/820-sec-support-layerscape.patch b/target/linux/layerscape/patches-4.14/820-sec-support-layerscape.patch
index 137486ffc6..9632b32d56 100644
--- a/target/linux/layerscape/patches-4.14/820-sec-support-layerscape.patch
+++ b/target/linux/layerscape/patches-4.14/820-sec-support-layerscape.patch
@@ -2641,7 +2641,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  	/* Skip assoc data */
  	append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF);
-@@ -456,29 +489,29 @@ EXPORT_SYMBOL(cnstr_shdsc_aead_decap);
+@@ -456,30 +489,29 @@ EXPORT_SYMBOL(cnstr_shdsc_aead_decap);
   * @cdata: pointer to block cipher transform definitions
   *         Valid algorithm values - one of OP_ALG_ALGSEL_{AES, DES, 3DES} ANDed
   *         with OP_ALG_AAI_CBC or OP_ALG_AAI_CTR_MOD128.
@@ -2649,12 +2649,12 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
 - *         split key is to be used, the size of the split key itself is
 - *         specified. Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1,
 - *         SHA224, SHA256, SHA384, SHA512} ANDed with OP_ALG_AAI_HMAC_PRECOMP.
+- * @ivsize: initialization vector size
 + * @adata: pointer to authentication transform definitions.
 + *         A split key is required for SEC Era < 6; the size of the split key
 + *         is specified in this case. Valid algorithm values - one of
 + *         OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed
-+ *         with OP_ALG_AAI_HMAC_PRECOMP.
-  * @ivsize: initialization vector size
++ *         with OP_ALG_AAI_HMAC_PRECOMP. * @ivsize: initialization vector size
   * @icvsize: integrity check value (ICV) size (truncated or full)
   * @is_rfc3686: true when ctr(aes) is wrapped by rfc3686 template
   * @nonce: pointer to rfc3686 nonce
@@ -2672,6 +2672,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
 +			       const bool is_qi, int era)
  {
  	u32 geniv, moveiv;
+ 	u32 *wait_cmd;
  
  	/* Note: Context registers are saved. */
 -	init_sh_desc_key_aead(desc, cdata, adata, is_rfc3686, nonce);
@@ -2679,7 +2680,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  	if (is_qi) {
  		u32 *wait_load_cmd;
-@@ -528,8 +561,13 @@ copy_iv:
+@@ -529,8 +561,13 @@ copy_iv:
  			 OP_ALG_ENCRYPT);
  
  	/* Read and write assoclen bytes */
@@ -2695,7 +2696,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  	/* Skip assoc data */
  	append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF);
-@@ -583,14 +621,431 @@ copy_iv:
+@@ -592,14 +629,431 @@ copy_iv:
  EXPORT_SYMBOL(cnstr_shdsc_aead_givencap);
  
  /**
@@ -3128,7 +3129,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  {
  	u32 *key_jump_cmd, *zero_payload_jump_cmd, *zero_assoc_jump_cmd1,
  	    *zero_assoc_jump_cmd2;
-@@ -612,11 +1067,35 @@ void cnstr_shdsc_gcm_encap(u32 * const d
+@@ -621,11 +1075,35 @@ void cnstr_shdsc_gcm_encap(u32 * const d
  	append_operation(desc, cdata->algtype | OP_ALG_AS_INITFINAL |
  			 OP_ALG_ENCRYPT);
  
@@ -3165,7 +3166,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  	/* if assoclen is ZERO, skip reading the assoc data */
  	append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ);
  	zero_assoc_jump_cmd1 = append_jump(desc, JUMP_TEST_ALL |
-@@ -648,8 +1127,11 @@ void cnstr_shdsc_gcm_encap(u32 * const d
+@@ -657,8 +1135,11 @@ void cnstr_shdsc_gcm_encap(u32 * const d
  	append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
  			     FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST1);
  
@@ -3179,7 +3180,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  	/* zero-payload commands */
  	set_jump_tgt_here(desc, zero_payload_jump_cmd);
-@@ -657,10 +1139,18 @@ void cnstr_shdsc_gcm_encap(u32 * const d
+@@ -666,10 +1147,18 @@ void cnstr_shdsc_gcm_encap(u32 * const d
  	/* read assoc data */
  	append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
  			     FIFOLD_TYPE_AAD | FIFOLD_TYPE_LAST1);
@@ -3198,7 +3199,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  	/* write ICV */
  	append_seq_store(desc, icvsize, LDST_CLASS_1_CCB |
  			 LDST_SRCDST_BYTE_CONTEXT);
-@@ -677,10 +1167,13 @@ EXPORT_SYMBOL(cnstr_shdsc_gcm_encap);
+@@ -686,10 +1175,13 @@ EXPORT_SYMBOL(cnstr_shdsc_gcm_encap);
   * @desc: pointer to buffer used for descriptor construction
   * @cdata: pointer to block cipher transform definitions
   *         Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with OP_ALG_AAI_GCM.
@@ -3213,7 +3214,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  {
  	u32 *key_jump_cmd, *zero_payload_jump_cmd, *zero_assoc_jump_cmd1;
  
-@@ -701,6 +1194,24 @@ void cnstr_shdsc_gcm_decap(u32 * const d
+@@ -710,6 +1202,24 @@ void cnstr_shdsc_gcm_decap(u32 * const d
  	append_operation(desc, cdata->algtype | OP_ALG_AS_INITFINAL |
  			 OP_ALG_DECRYPT | OP_ALG_ICV_ON);
  
@@ -3238,7 +3239,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  	/* if assoclen is ZERO, skip reading the assoc data */
  	append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ);
  	zero_assoc_jump_cmd1 = append_jump(desc, JUMP_TEST_ALL |
-@@ -753,10 +1264,13 @@ EXPORT_SYMBOL(cnstr_shdsc_gcm_decap);
+@@ -762,10 +1272,13 @@ EXPORT_SYMBOL(cnstr_shdsc_gcm_decap);
   * @desc: pointer to buffer used for descriptor construction
   * @cdata: pointer to block cipher transform definitions
   *         Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with OP_ALG_AAI_GCM.
@@ -3253,7 +3254,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  {
  	u32 *key_jump_cmd;
  
-@@ -777,7 +1291,29 @@ void cnstr_shdsc_rfc4106_encap(u32 * con
+@@ -786,7 +1299,29 @@ void cnstr_shdsc_rfc4106_encap(u32 * con
  	append_operation(desc, cdata->algtype | OP_ALG_AS_INITFINAL |
  			 OP_ALG_ENCRYPT);
  
@@ -3284,7 +3285,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  	append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ);
  
  	/* Read assoc data */
-@@ -785,7 +1321,7 @@ void cnstr_shdsc_rfc4106_encap(u32 * con
+@@ -794,7 +1329,7 @@ void cnstr_shdsc_rfc4106_encap(u32 * con
  			     FIFOLD_TYPE_AAD | FIFOLD_TYPE_FLUSH1);
  
  	/* Skip IV */
@@ -3293,7 +3294,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  	/* Will read cryptlen bytes */
  	append_math_sub(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
-@@ -824,10 +1360,13 @@ EXPORT_SYMBOL(cnstr_shdsc_rfc4106_encap)
+@@ -833,10 +1368,13 @@ EXPORT_SYMBOL(cnstr_shdsc_rfc4106_encap)
   * @desc: pointer to buffer used for descriptor construction
   * @cdata: pointer to block cipher transform definitions
   *         Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with OP_ALG_AAI_GCM.
@@ -3308,7 +3309,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  {
  	u32 *key_jump_cmd;
  
-@@ -849,7 +1388,29 @@ void cnstr_shdsc_rfc4106_decap(u32 * con
+@@ -858,7 +1396,29 @@ void cnstr_shdsc_rfc4106_decap(u32 * con
  	append_operation(desc, cdata->algtype | OP_ALG_AS_INITFINAL |
  			 OP_ALG_DECRYPT | OP_ALG_ICV_ON);
  
@@ -3339,7 +3340,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  	append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ);
  
  	/* Read assoc data */
-@@ -857,7 +1418,7 @@ void cnstr_shdsc_rfc4106_decap(u32 * con
+@@ -866,7 +1426,7 @@ void cnstr_shdsc_rfc4106_decap(u32 * con
  			     FIFOLD_TYPE_AAD | FIFOLD_TYPE_FLUSH1);
  
  	/* Skip IV */
@@ -3348,7 +3349,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  	/* Will read cryptlen bytes */
  	append_math_sub(desc, VARSEQINLEN, SEQOUTLEN, REG3, CAAM_CMD_SZ);
-@@ -896,10 +1457,13 @@ EXPORT_SYMBOL(cnstr_shdsc_rfc4106_decap)
+@@ -905,10 +1465,13 @@ EXPORT_SYMBOL(cnstr_shdsc_rfc4106_decap)
   * @desc: pointer to buffer used for descriptor construction
   * @cdata: pointer to block cipher transform definitions
   *         Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with OP_ALG_AAI_GCM.
@@ -3363,7 +3364,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  {
  	u32 *key_jump_cmd, *read_move_cmd, *write_move_cmd;
  
-@@ -920,6 +1484,18 @@ void cnstr_shdsc_rfc4543_encap(u32 * con
+@@ -929,6 +1492,18 @@ void cnstr_shdsc_rfc4543_encap(u32 * con
  	append_operation(desc, cdata->algtype | OP_ALG_AS_INITFINAL |
  			 OP_ALG_ENCRYPT);
  
@@ -3382,7 +3383,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  	/* assoclen + cryptlen = seqinlen */
  	append_math_sub(desc, REG3, SEQINLEN, REG0, CAAM_CMD_SZ);
  
-@@ -931,7 +1507,7 @@ void cnstr_shdsc_rfc4543_encap(u32 * con
+@@ -940,7 +1515,7 @@ void cnstr_shdsc_rfc4543_encap(u32 * con
  	read_move_cmd = append_move(desc, MOVE_SRC_DESCBUF | MOVE_DEST_MATH3 |
  				    (0x6 << MOVE_LEN_SHIFT));
  	write_move_cmd = append_move(desc, MOVE_SRC_MATH3 | MOVE_DEST_DESCBUF |
@@ -3391,7 +3392,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  	/* Will read assoclen + cryptlen bytes */
  	append_math_sub(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
-@@ -966,10 +1542,13 @@ EXPORT_SYMBOL(cnstr_shdsc_rfc4543_encap)
+@@ -975,10 +1550,13 @@ EXPORT_SYMBOL(cnstr_shdsc_rfc4543_encap)
   * @desc: pointer to buffer used for descriptor construction
   * @cdata: pointer to block cipher transform definitions
   *         Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with OP_ALG_AAI_GCM.
@@ -3406,7 +3407,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  {
  	u32 *key_jump_cmd, *read_move_cmd, *write_move_cmd;
  
-@@ -990,6 +1569,18 @@ void cnstr_shdsc_rfc4543_decap(u32 * con
+@@ -999,6 +1577,18 @@ void cnstr_shdsc_rfc4543_decap(u32 * con
  	append_operation(desc, cdata->algtype | OP_ALG_AS_INITFINAL |
  			 OP_ALG_DECRYPT | OP_ALG_ICV_ON);
  
@@ -3425,7 +3426,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  	/* assoclen + cryptlen = seqoutlen */
  	append_math_sub(desc, REG3, SEQOUTLEN, REG0, CAAM_CMD_SZ);
  
-@@ -1001,7 +1592,7 @@ void cnstr_shdsc_rfc4543_decap(u32 * con
+@@ -1010,7 +1600,7 @@ void cnstr_shdsc_rfc4543_decap(u32 * con
  	read_move_cmd = append_move(desc, MOVE_SRC_DESCBUF | MOVE_DEST_MATH3 |
  				    (0x6 << MOVE_LEN_SHIFT));
  	write_move_cmd = append_move(desc, MOVE_SRC_MATH3 | MOVE_DEST_DESCBUF |
@@ -3434,7 +3435,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  	/* Will read assoclen + cryptlen bytes */
  	append_math_sub(desc, VARSEQINLEN, SEQOUTLEN, REG0, CAAM_CMD_SZ);
-@@ -1035,6 +1626,138 @@ void cnstr_shdsc_rfc4543_decap(u32 * con
+@@ -1044,6 +1634,138 @@ void cnstr_shdsc_rfc4543_decap(u32 * con
  }
  EXPORT_SYMBOL(cnstr_shdsc_rfc4543_decap);
  
@@ -3573,7 +3574,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  /*
   * For ablkcipher encrypt and decrypt, read from req->src and
   * write to req->dst
-@@ -1053,7 +1776,8 @@ static inline void ablkcipher_append_src
+@@ -1062,7 +1784,8 @@ static inline void ablkcipher_append_src
   * @desc: pointer to buffer used for descriptor construction
   * @cdata: pointer to block cipher transform definitions
   *         Valid algorithm values - one of OP_ALG_ALGSEL_{AES, DES, 3DES} ANDed
@@ -3583,7 +3584,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
   * @ivsize: initialization vector size
   * @is_rfc3686: true when ctr(aes) is wrapped by rfc3686 template
   * @ctx1_iv_off: IV offset in CONTEXT1 register
-@@ -1075,7 +1799,7 @@ void cnstr_shdsc_ablkcipher_encap(u32 *
+@@ -1084,7 +1807,7 @@ void cnstr_shdsc_ablkcipher_encap(u32 *
  
  	/* Load nonce into CONTEXT1 reg */
  	if (is_rfc3686) {
@@ -3592,7 +3593,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  		append_load_as_imm(desc, nonce, CTR_RFC3686_NONCE_SIZE,
  				   LDST_CLASS_IND_CCB |
-@@ -1118,7 +1842,8 @@ EXPORT_SYMBOL(cnstr_shdsc_ablkcipher_enc
+@@ -1127,7 +1850,8 @@ EXPORT_SYMBOL(cnstr_shdsc_ablkcipher_enc
   * @desc: pointer to buffer used for descriptor construction
   * @cdata: pointer to block cipher transform definitions
   *         Valid algorithm values - one of OP_ALG_ALGSEL_{AES, DES, 3DES} ANDed
@@ -3602,7 +3603,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
   * @ivsize: initialization vector size
   * @is_rfc3686: true when ctr(aes) is wrapped by rfc3686 template
   * @ctx1_iv_off: IV offset in CONTEXT1 register
-@@ -1140,7 +1865,7 @@ void cnstr_shdsc_ablkcipher_decap(u32 *
+@@ -1149,7 +1873,7 @@ void cnstr_shdsc_ablkcipher_decap(u32 *
  
  	/* Load nonce into CONTEXT1 reg */
  	if (is_rfc3686) {
@@ -3611,7 +3612,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  
  		append_load_as_imm(desc, nonce, CTR_RFC3686_NONCE_SIZE,
  				   LDST_CLASS_IND_CCB |
-@@ -1209,7 +1934,7 @@ void cnstr_shdsc_ablkcipher_givencap(u32
+@@ -1218,7 +1942,7 @@ void cnstr_shdsc_ablkcipher_givencap(u32
  
  	/* Load Nonce into CONTEXT1 reg */
  	if (is_rfc3686) {