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authorYangbo Lu <yangbo.lu@nxp.com>2020-04-10 10:47:05 +0800
committerPetr Štetiar <ynezz@true.cz>2020-05-07 12:53:06 +0200
commitcddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch)
tree392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/819-uart-0012-tty-serial-lpuart-add-LS1028A-support.patch
parentd1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff)
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layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/819-uart-0012-tty-serial-lpuart-add-LS1028A-support.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/819-uart-0012-tty-serial-lpuart-add-LS1028A-support.patch68
1 files changed, 68 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/819-uart-0012-tty-serial-lpuart-add-LS1028A-support.patch b/target/linux/layerscape/patches-5.4/819-uart-0012-tty-serial-lpuart-add-LS1028A-support.patch
new file mode 100644
index 0000000000..a4cb65cfec
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/819-uart-0012-tty-serial-lpuart-add-LS1028A-support.patch
@@ -0,0 +1,68 @@
+From 932dac0380bbf7276d4111c35674679bc9ad6384 Mon Sep 17 00:00:00 2001
+From: Vabhav Sharma <vabhav.sharma@nxp.com>
+Date: Thu, 31 Oct 2019 19:20:47 +0530
+Subject: [PATCH] tty: serial: lpuart: add LS1028A support
+
+NXP LS1028A lpuart is the same IP as LS1021A, but it is
+little endian for register accessing instead of big endian
+on LS1021A.
+
+So add LS1028A matching data to distiguish the chips.
+
+Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
+Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
+Acked-by: Fugang Duan <fugang.duan@nxp.com>
+---
+ drivers/tty/serial/fsl_lpuart.c | 14 ++++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
+--- a/drivers/tty/serial/fsl_lpuart.c
++++ b/drivers/tty/serial/fsl_lpuart.c
+@@ -3,6 +3,7 @@
+ * Freescale lpuart serial port driver
+ *
+ * Copyright 2012-2014 Freescale Semiconductor, Inc.
++ * Copyright 2019 NXP
+ */
+
+ #if defined(CONFIG_SERIAL_FSL_LPUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+@@ -260,6 +261,7 @@ static DEFINE_IDA(fsl_lpuart_ida);
+ enum lpuart_type {
+ VF610_LPUART,
+ LS1021A_LPUART,
++ LS1028A_LPUART,
+ IMX7ULP_LPUART,
+ IMX8QXP_LPUART,
+ };
+@@ -311,13 +313,20 @@ static const struct lpuart_soc_data vf_d
+ .rx_dma_cyclic = true,
+ };
+
+-static const struct lpuart_soc_data ls_data = {
++static const struct lpuart_soc_data ls1021a_data = {
+ .devtype = LS1021A_LPUART,
+ .iotype = UPIO_MEM32BE,
+ .rx_watermark = 0,
+ .rx_dma_cyclic = true,
+ };
+
++static const struct lpuart_soc_data ls1028a_data = {
++ .devtype = LS1028A_LPUART,
++ .iotype = UPIO_MEM32,
++ .rx_watermark = 0,
++ .rx_dma_cyclic = true,
++};
++
+ static struct lpuart_soc_data imx7ulp_data = {
+ .devtype = IMX7ULP_LPUART,
+ .iotype = UPIO_MEM32,
+@@ -336,7 +345,8 @@ static struct lpuart_soc_data imx8qxp_da
+
+ static const struct of_device_id lpuart_dt_ids[] = {
+ { .compatible = "fsl,vf610-lpuart", .data = &vf_data, },
+- { .compatible = "fsl,ls1021a-lpuart", .data = &ls_data, },
++ { .compatible = "fsl,ls1021a-lpuart", .data = &ls1021a_data, },
++ { .compatible = "fsl,ls1028a-lpuart", .data = &ls1028a_data, },
+ { .compatible = "fsl,imx7ulp-lpuart", .data = &imx7ulp_data, },
+ { .compatible = "fsl,imx8qxp-lpuart", .data = &imx8qxp_data, },
+ { /* sentinel */ }